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Searched refs:DVBS2_REG_BASE (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
6064 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6066 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6068 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6070 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6072 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6085 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6086 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6087 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6089 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
6064 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6066 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6068 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6070 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6072 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6085 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6086 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6087 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6089 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
5907 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5909 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
5911 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
5913 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5915 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
5928 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
5929 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
5930 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
5932 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
6050 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6052 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6054 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6056 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6058 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6071 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6072 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6073 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6075 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
6050 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6052 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6054 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6056 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6058 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6071 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6072 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6073 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6075 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
5907 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5909 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
5911 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
5913 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5915 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
5928 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
5929 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
5930 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
5932 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBS.c138 #define DVBS2_REG_BASE 0x3A00 macro
5907 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5909 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
5911 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
5913 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5915 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
5928 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
5929 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
5930 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
5932 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBS.c135 #define DVBS2_REG_BASE 0x3A00 macro
5844 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5846 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
5848 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
5850 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
5852 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
5865 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
5866 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
5867 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
5869 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBS.c135 #define DVBS2_REG_BASE 0x3A00 macro
6022 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6024 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6026 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6028 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6030 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6043 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6044 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6045 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6047 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBS.c135 #define DVBS2_REG_BASE 0x3A00 macro
6046 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6048 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6050 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6052 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6054 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6067 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6068 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6069 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6071 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBS.c137 #define DVBS2_REG_BASE 0x1500 macro
6637 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xCD, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6639 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCD, u8Data); in INTERN_DVBS_DiSEqC_Init()
6641 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x00); in INTERN_DVBS_DiSEqC_Init()
6643 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC0, &u8Data); in INTERN_DVBS_DiSEqC_Init()
6645 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, u8Data); in INTERN_DVBS_DiSEqC_Init()
6658 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC4, 0x01);//0x62;DVBS2_DISEQC_TX1 in INTERN_DVBS_DiSEqC_SetTone()
6659 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xC0, 0x4E);//0x60 in INTERN_DVBS_DiSEqC_SetTone()
6660 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBS2_REG_BASE + 0xCC, 0x88);//0x66 in INTERN_DVBS_DiSEqC_SetTone()
6662 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBS2_REG_BASE + 0xC2, &u8Data);//0x61 in INTERN_DVBS_DiSEqC_SetTone()
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