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Searched refs:DMDANA_REG_BASE (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2330 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2332 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2470 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2472 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2330 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2332 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2470 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2472 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2175 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2177 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2315 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2317 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2318 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2320 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2458 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2460 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2318 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2320 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2458 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2460 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2175 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2177 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2315 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2317 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A DhalDMD_INTERN_DVBS.c146 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2175 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2177 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2315 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2317 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A DhalDMD_INTERN_DVBS.c143 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2166 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2168 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2303 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2305 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A DhalDMD_INTERN_DVBS.c143 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2334 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2336 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2471 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2473 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A DhalDMD_INTERN_DVBS.c143 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2365 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2367 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2502 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2504 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A DhalDMD_INTERN_DVBS.c144 #define DMDANA_REG_BASE 0x2E00 //DMDDTOP//reg_dmdana.xls macro
2200 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_Config()
2202 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_Config()
2340 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DMDANA_REG_BASE+0xC0, &u8Data);//Demod\reg_dmdana.xls in INTERN_DVBS_BlindScan_Config()
2342 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DMDANA_REG_BASE+0xC0, u8Data); in INTERN_DVBS_BlindScan_Config()