| /rockchip-linux_mpp/mpp/hal/vpu/h264e/ |
| H A D | hal_h264e_vepu_v2.c | 303 MPP_RET h264e_vepu_prep_setup(HalH264eVepuPrep *prep, MppEncPrepCfg *cfg) in h264e_vepu_prep_setup() argument
328 prep->src_fmt = format; in h264e_vepu_prep_setup()
329 prep->rotation = rotation; in h264e_vepu_prep_setup()
330 prep->src_w = width; in h264e_vepu_prep_setup()
331 prep->src_h = height; in h264e_vepu_prep_setup()
334 prep->r_mask_msb = fmt_cfg.r_mask; in h264e_vepu_prep_setup()
335 prep->g_mask_msb = fmt_cfg.g_mask; in h264e_vepu_prep_setup()
336 prep->b_mask_msb = fmt_cfg.b_mask; in h264e_vepu_prep_setup()
337 prep->swap_8_in = fmt_cfg.swap_8_in; in h264e_vepu_prep_setup()
338 prep->swap_16_in = fmt_cfg.swap_16_in; in h264e_vepu_prep_setup()
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| H A D | hal_h264e_vepu1_v2.c | 198 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu1_get_task_v2() local
208 h264e_vepu_buf_set_frame_size(hw_bufs, prep->width, prep->height); in hal_h264e_vepu1_get_task_v2()
211 if (h264e_vepu_prep_setup(hw_prep, prep)) in hal_h264e_vepu1_get_task_v2()
233 hw_offset->fmt = prep->format; in hal_h264e_vepu1_get_task_v2()
234 hw_offset->width = prep->width; in hal_h264e_vepu1_get_task_v2()
235 hw_offset->height = prep->height; in hal_h264e_vepu1_get_task_v2()
236 hw_offset->hor_stride = prep->hor_stride; in hal_h264e_vepu1_get_task_v2()
237 hw_offset->ver_stride = prep->ver_stride; in hal_h264e_vepu1_get_task_v2()
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| H A D | hal_h264e_vepu2_v2.c | 199 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu2_get_task_v2() local
209 h264e_vepu_buf_set_frame_size(hw_bufs, prep->width, prep->height); in hal_h264e_vepu2_get_task_v2()
212 if (h264e_vepu_prep_setup(hw_prep, prep)) in hal_h264e_vepu2_get_task_v2()
234 hw_offset->fmt = prep->format; in hal_h264e_vepu2_get_task_v2()
235 hw_offset->width = prep->width; in hal_h264e_vepu2_get_task_v2()
236 hw_offset->height = prep->height; in hal_h264e_vepu2_get_task_v2()
237 hw_offset->hor_stride = prep->hor_stride; in hal_h264e_vepu2_get_task_v2()
238 hw_offset->ver_stride = prep->ver_stride; in hal_h264e_vepu2_get_task_v2()
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| H A D | hal_h264e_vepu_v2.h | 189 MPP_RET h264e_vepu_prep_setup(HalH264eVepuPrep *prep, MppEncPrepCfg *cfg);
190 MPP_RET h264e_vepu_prep_get_addr(HalH264eVepuPrep *prep, MppBuffer buffer,
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| /rockchip-linux_mpp/mpp/codec/enc/vp8/ |
| H A D | vp8e_api_v2.c | 56 MppEncPrepCfg *prep = &ctrl_cfg->cfg->prep; in vp8e_init() local
72 prep->width = 1280; in vp8e_init()
73 prep->height = 720; in vp8e_init()
74 prep->hor_stride = 1280; in vp8e_init()
75 prep->ver_stride = 720; in vp8e_init()
76 prep->format = MPP_FMT_YUV420SP; in vp8e_init()
77 prep->rotation = MPP_ENC_ROT_0; in vp8e_init()
78 prep->rotation_ext = MPP_ENC_ROT_0; in vp8e_init()
79 prep->mirroring = 0; in vp8e_init()
80 prep->mirroring_ext = 0; in vp8e_init()
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| /rockchip-linux_mpp/mpp/base/ |
| H A D | mpp_enc_cfg.c | 101 STRUCT_START(prep); \
102 …, s32, rk_s32, width, FLAG_BASE(0), prep, width_set); \
103 … s32, rk_s32, height, FLAG_PREV, prep, height_set); \
104 …, s32, rk_s32, max_width, FLAG_PREV, prep, max_width); \
105 … s32, rk_s32, max_height, FLAG_PREV, prep, max_height); \
106 … s32, rk_s32, hor_stride, FLAG_PREV, prep, hor_stride); \
107 … s32, rk_s32, ver_stride, FLAG_PREV, prep, ver_stride); \
108 …fix, s32, rk_s32, format, FLAG_INCR, prep, format); \
109 … s32, rk_s32, format_out, FLAG_PREV, prep, format_out); \
110 …, rk_s32, chroma_ds_mode, FLAG_PREV, prep, chroma_ds_mode); \
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| /rockchip-linux_mpp/mpp/codec/enc/h265/ |
| H A D | h265e_ps.c | 119 MppEncPrepCfg *prep = &ctx->cfg->prep; in h265e_set_vps() local
121 RK_U32 maxlumas = prep->width * prep->height; in h265e_set_vps()
157 if (prep->format == MPP_FMT_YUV400) { in h265e_set_vps()
184 MppEncPrepCfg *prep = &ctx->cfg->prep; in h265e_set_sps() local
188 MppFrameFormat fmt = prep->format; in h265e_set_sps()
229 if ((prep->width % minCUDepth) != 0) { in h265e_set_sps()
231 RK_U32 rem = prep->width % minCUDepth; in h265e_set_sps()
240 if ((prep->height % minCUDepth) != 0) { in h265e_set_sps()
242 RK_U32 rem = prep->height % minCUDepth; in h265e_set_sps()
257 sps->m_picWidthInLumaSamples = prep->width + pad[0]; in h265e_set_sps()
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| H A D | h265e_api.c | 45 MppEncPrepCfg *prep = &ctrlCfg->cfg->prep; in h265e_init() local
132 prep->width = 1280; in h265e_init()
133 prep->height = 720; in h265e_init()
134 prep->hor_stride = 1280; in h265e_init()
135 prep->ver_stride = 720; in h265e_init()
136 prep->format = MPP_FMT_YUV420SP; in h265e_init()
137 prep->color = MPP_FRAME_SPC_UNSPECIFIED; in h265e_init()
138 prep->colorprim = MPP_FRAME_PRI_UNSPECIFIED; in h265e_init()
139 prep->colortrc = MPP_FRAME_TRC_UNSPECIFIED; in h265e_init()
140 prep->range = MPP_FRAME_RANGE_UNSPECIFIED; in h265e_init()
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| H A D | h265e_syntax.c | 48 pp->pic_width = h->cfg->prep.width; in fill_picture_parameters()
49 pp->pic_height = h->cfg->prep.height; in fill_picture_parameters()
50 pp->hor_stride = h->cfg->prep.hor_stride; in fill_picture_parameters()
51 pp->ver_stride = h->cfg->prep.ver_stride; in fill_picture_parameters()
55 pp->mpp_format = cfg->prep.format; in fill_picture_parameters()
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| /rockchip-linux_mpp/mpp/codec/enc/h264/ |
| H A D | h264e_sps.c | 64 MppEncPrepCfg *prep = &cfg->prep; in h264e_sps_update() local
69 MppFrameFormat fmt = prep->format; in h264e_sps_update()
71 RK_S32 width = prep->width; in h264e_sps_update()
72 RK_S32 height = prep->height; in h264e_sps_update()
225 if (prep->range == MPP_FRAME_RANGE_JPEG) { in h264e_sps_update()
230 if ((prep->colorprim <= MPP_FRAME_PRI_JEDEC_P22 && in h264e_sps_update()
231 prep->colorprim != MPP_FRAME_PRI_UNSPECIFIED) || in h264e_sps_update()
232 (prep->colortrc <= MPP_FRAME_TRC_ARIB_STD_B67 && in h264e_sps_update()
233 prep->colortrc != MPP_FRAME_TRC_UNSPECIFIED) || in h264e_sps_update()
234 (prep->color <= MPP_FRAME_SPC_ICTCP && in h264e_sps_update()
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| H A D | h264e_api_v2.c | 95 MppEncPrepCfg *prep = &cfg->prep; in init_h264e_cfg_set() local
147 prep->width = 1280; in init_h264e_cfg_set()
148 prep->height = 720; in init_h264e_cfg_set()
149 prep->hor_stride = 1280; in init_h264e_cfg_set()
150 prep->ver_stride = 720; in init_h264e_cfg_set()
151 prep->format = MPP_FMT_YUV420SP; in init_h264e_cfg_set()
152 prep->rotation = MPP_ENC_ROT_0; in init_h264e_cfg_set()
153 prep->rotation_ext = MPP_ENC_ROT_0; in init_h264e_cfg_set()
154 prep->color = MPP_FRAME_SPC_UNSPECIFIED; in init_h264e_cfg_set()
155 prep->colorprim = MPP_FRAME_PRI_UNSPECIFIED; in init_h264e_cfg_set()
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| /rockchip-linux_mpp/mpp/codec/enc/jpeg/ |
| H A D | jpege_api_v2.c | 226 MppEncPrepCfg *prep = &cfg->prep; in jpege_proc_hal() local
232 syntax->width = prep->width; in jpege_proc_hal()
233 syntax->height = prep->height; in jpege_proc_hal()
234 syntax->hor_stride = prep->hor_stride; in jpege_proc_hal()
235 syntax->ver_stride = prep->ver_stride; in jpege_proc_hal()
236 syntax->format = prep->format; in jpege_proc_hal()
237 syntax->format_out = prep->format_out; in jpege_proc_hal()
238 syntax->color = prep->color; in jpege_proc_hal()
239 syntax->rotation = prep->rotation; in jpege_proc_hal()
240 syntax->mirroring = prep->mirroring; in jpege_proc_hal()
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| /rockchip-linux_mpp/mpp/hal/rkenc/jpege/ |
| H A D | hal_jpege_vpu720.c | 195 MppFrameFormat in_fmt = ctx->cfg->prep.format & MPP_FRAME_FMT_MASK; in jpege_vpu720_setup_format()
206 if (MPP_FRAME_FMT_IS_TILE(ctx->cfg->prep.format)) { in jpege_vpu720_setup_format()
337 switch (ctx->cfg->prep.chroma_ds_mode) { in jpege_vpu720_setup_format()
350 ctx->cfg->prep.format, ctx->cfg->prep.format_out, in jpege_vpu720_setup_format()
354 if (ctx->cfg->prep.mirroring) in jpege_vpu720_setup_format()
357 if (ctx->cfg->prep.fix_chroma_en) { in jpege_vpu720_setup_format()
359 ctx->fmt_cfg.fix_chroma_u = ctx->cfg->prep.fix_chroma_u & 0xff; in jpege_vpu720_setup_format()
360 ctx->fmt_cfg.fix_chroma_v = ctx->cfg->prep.fix_chroma_v & 0xff; in jpege_vpu720_setup_format()
363 ctx->fmt_cfg.src_range = (ctx->cfg->prep.range == MPP_FRAME_RANGE_UNSPECIFIED) ? in jpege_vpu720_setup_format()
364 MPP_FRAME_RANGE_JPEG : ctx->cfg->prep.range; in jpege_vpu720_setup_format()
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| /rockchip-linux_mpp/mpp/hal/rkenc/h264e/ |
| H A D | hal_h264e_vepu541.c | 228 MppEncPrepCfg *prep = &cfg->prep; in setup_hal_bufs() local
230 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment); in setup_hal_bufs()
231 RK_S32 aligned_h = MPP_ALIGN(prep->height, alignment) + 16; in setup_hal_bufs()
275 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu541_prepare() local
279 if (prep->change_res) { in hal_h264e_vepu541_prepare()
287 prep->change_res = 0; in hal_h264e_vepu541_prepare()
452 MppEncPrepCfg *prep = &ctx->cfg->prep; in setup_vepu541_prep() local
453 MppFrameFormat fmt = prep->format; in setup_vepu541_prep()
466 regs->reg012.pic_wd8_m1 = MPP_ALIGN(prep->width, 16) / 8 - 1; in setup_vepu541_prep()
467 regs->reg012.pic_wfill = MPP_ALIGN(prep->width, 16) - prep->width; in setup_vepu541_prep()
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| H A D | hal_h264e_vepu510.c | 400 MppEncPrepCfg *prep = &cfg->prep; in setup_hal_bufs() local
403 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment_w); in setup_hal_bufs()
404 RK_S32 aligned_h = MPP_ALIGN(prep->height, alignment_h) + 16; in setup_hal_bufs()
476 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu510_prepare() local
480 if (prep->change_res) { in hal_h264e_vepu510_prepare()
488 prep->change_res = 0; in hal_h264e_vepu510_prepare()
699 static MPP_RET setup_vepu510_prep(HalVepu510RegSet *regs, MppEncPrepCfg *prep) in setup_vepu510_prep() argument
703 MppFrameFormat fmt = prep->format; in setup_vepu510_prep()
715 reg_frm->common.enc_rsl.pic_wd8_m1 = MPP_ALIGN(prep->width, 16) / 8 - 1; in setup_vepu510_prep()
716 reg_frm->common.src_fill.pic_wfill = MPP_ALIGN(prep->width, 16) - prep->width; in setup_vepu510_prep()
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| H A D | hal_h264e_vepu580.c | 424 MppEncPrepCfg *prep = &cfg->prep; in setup_hal_bufs() local
427 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment_w); in setup_hal_bufs()
428 RK_S32 aligned_h = MPP_ALIGN(prep->height, alignment_h) + 16; in setup_hal_bufs()
498 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu580_prepare() local
502 if (prep->change_res) { in hal_h264e_vepu580_prepare()
510 prep->change_res = 0; in hal_h264e_vepu580_prepare()
702 static MPP_RET setup_vepu580_prep(HalVepu580RegSet *regs, MppEncPrepCfg *prep, in setup_vepu580_prep() argument
706 MppFrameFormat fmt = prep->format; in setup_vepu580_prep()
718 regs->reg_base.enc_rsl.pic_wd8_m1 = MPP_ALIGN(prep->width, 16) / 8 - 1; in setup_vepu580_prep()
719 regs->reg_base.src_fill.pic_wfill = MPP_ALIGN(prep->width, 16) - prep->width; in setup_vepu580_prep()
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| H A D | hal_h264e_vepu540c.c | 203 MppEncPrepCfg *prep = &cfg->prep; in setup_hal_bufs() local
205 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment); in setup_hal_bufs()
206 RK_S32 aligned_h = MPP_ALIGN(prep->height, alignment); in setup_hal_bufs()
282 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu540c_prepare() local
286 if (prep->change_res) { in hal_h264e_vepu540c_prepare()
294 prep->change_res = 0; in hal_h264e_vepu540c_prepare()
454 static MPP_RET setup_vepu540c_prep(HalVepu540cRegSet *regs, MppEncPrepCfg *prep) in setup_vepu540c_prep() argument
457 MppFrameFormat fmt = prep->format; in setup_vepu540c_prep()
469 regs->reg_base.enc_rsl.pic_wd8_m1 = MPP_ALIGN(prep->width, 16) / 8 - 1; in setup_vepu540c_prep()
470 regs->reg_base.src_fill.pic_wfill = MPP_ALIGN(prep->width, 16) - prep->width; in setup_vepu540c_prep()
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| H A D | hal_h264e_vepu511.c | 399 MppEncPrepCfg *prep = &cfg->prep; in setup_hal_bufs() local
402 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment_w); in setup_hal_bufs()
403 RK_S32 aligned_h = MPP_ALIGN(prep->height, alignment_h) + 16; in setup_hal_bufs()
475 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h264e_vepu511_prepare() local
479 if (prep->change_res) { in hal_h264e_vepu511_prepare()
487 prep->change_res = 0; in hal_h264e_vepu511_prepare()
698 static MPP_RET setup_vepu511_prep(HalVepu511RegSet *regs, MppEncPrepCfg *prep, HalEncTask *task) in setup_vepu511_prep() argument
702 MppFrameFormat fmt = prep->format; in setup_vepu511_prep()
714 reg_frm->common.enc_rsl.pic_wd8_m1 = MPP_ALIGN(prep->width, 16) / 8 - 1; in setup_vepu511_prep()
715 reg_frm->common.src_fill.pic_wfill = MPP_ALIGN(prep->width, 16) - prep->width; in setup_vepu511_prep()
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| /rockchip-linux_mpp/mpp/hal/common/ |
| H A D | hal_info.c | 252 MppEncPrepCfg *prep = &cfg->prep; in hal_info_from_enc_cfg() local
257 hal_info_set(ctx, ENC_INFO_WIDTH, CODEC_INFO_FLAG_NUMBER, prep->width); in hal_info_from_enc_cfg()
258 hal_info_set(ctx, ENC_INFO_HEIGHT, CODEC_INFO_FLAG_NUMBER, prep->height); in hal_info_from_enc_cfg()
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| /rockchip-linux_mpp/mpp/hal/rkenc/h265e/ |
| H A D | hal_h265e_vepu510_tune.c | 158 RK_S32 w32 = MPP_ALIGN(ctx->cfg->prep.width, 32); in vepu510_h265e_tune_qpmap_init()
159 RK_S32 h32 = MPP_ALIGN(ctx->cfg->prep.height, 32); in vepu510_h265e_tune_qpmap_init()
246 RK_S32 w32 = MPP_ALIGN(cfg->prep.width, 32); in vepu510_h265e_tune_stat_update()
247 RK_S32 h32 = MPP_ALIGN(cfg->prep.height, 32); in vepu510_h265e_tune_stat_update()
248 RK_U32 b16_num = MPP_ALIGN(cfg->prep.width, 16) * MPP_ALIGN(cfg->prep.height, 16) / 256; in vepu510_h265e_tune_stat_update()
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| H A D | hal_h265e_vepu540c.c | 130 MppEncPrepCfg *prep = &ctx->cfg->prep; in vepu540c_h265_setup_hal_bufs() local
134 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment); in vepu540c_h265_setup_hal_bufs()
138 mb_wd64 = (prep->width + 63) / 64; in vepu540c_h265_setup_hal_bufs()
139 mb_h64 = (prep->height + 63) / 64; in vepu540c_h265_setup_hal_bufs()
141 frame_size = MPP_ALIGN(prep->width, 16) * MPP_ALIGN(prep->height, 16); in vepu540c_h265_setup_hal_bufs()
142 vepu5xx_set_fmt(fmt, ctx->cfg->prep.format); in vepu540c_h265_setup_hal_bufs()
589 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h265e_vepu540c_prepare() local
593 if (prep->change_res) { in hal_h265e_vepu540c_prepare()
601 prep->change_res = 0; in hal_h265e_vepu540c_prepare()
1161 RK_U32 mb_w = MPP_ALIGN(enc_cfg->prep.width, 64) / 64; in vepu540c_h265_set_split()
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| H A D | hal_h265e_vepu510.c | 306 MppEncPrepCfg *prep = &ctx->cfg->prep; in vepu510_h265_setup_hal_bufs() local
310 RK_S32 aligned_w = MPP_ALIGN(prep->width, alignment); in vepu510_h265_setup_hal_bufs()
314 mb_wd64 = (prep->width + 63) / 64; in vepu510_h265_setup_hal_bufs()
315 mb_h64 = (prep->height + 63) / 64 + 1; in vepu510_h265_setup_hal_bufs()
317 frame_size = MPP_ALIGN(prep->width, 16) * MPP_ALIGN(prep->height, 16); in vepu510_h265_setup_hal_bufs()
318 vepu5xx_set_fmt(fmt, ctx->cfg->prep.format); in vepu510_h265_setup_hal_bufs()
380 RK_S32 ctu_w = (prep->width + 31) / 32; in vepu510_h265_setup_hal_bufs()
381 RK_S32 ctu_h = (prep->height + 31) / 32; in vepu510_h265_setup_hal_bufs()
1185 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h265e_vepu510_prepare() local
1189 if (prep->change_res) { in hal_h265e_vepu510_prepare()
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| H A D | hal_h265e_vepu541.c | 154 MppEncPrepCfg *prep = &ctx->cfg->prep; in vepu54x_h265_setup_hal_bufs() local
160 mb_wd64 = (prep->width + 63) / 64; in vepu54x_h265_setup_hal_bufs()
161 mb_h64 = (prep->height + 63) / 64 + 1; in vepu54x_h265_setup_hal_bufs()
163 frame_size = MPP_ALIGN(prep->width, 16) * MPP_ALIGN(prep->height, 16); in vepu54x_h265_setup_hal_bufs()
164 vepu5xx_set_fmt(fmt, ctx->cfg->prep.format); in vepu54x_h265_setup_hal_bufs()
704 MppEncPrepCfg *prep = &ctx->cfg->prep; in hal_h265e_vepu54x_prepare() local
708 if (prep->change_res) { in hal_h265e_vepu54x_prepare()
716 prep->change_res = 0; in hal_h265e_vepu54x_prepare()
823 RK_U32 h = ctx->cfg->prep.height; in setup_vepu541_intra_refresh()
824 RK_U32 w = ctx->cfg->prep.width; in setup_vepu541_intra_refresh()
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| /rockchip-linux_mpp/doc/ |
| H A D | Rockchip_Developer_Guide_MPP_CN.md | 652 | prep:width | S32 | RK_S32 | 表示图像水平方向像素数，单位为像素个数。 …
653 | prep:height | S32 | RK_S32 | 表示图像垂直方向像素数，单位为像素个数。 …
654 | prep:format | S32 | MppFrameFormat | 表示图像色彩空间格式以及内存排布方式。  local
814 data[12] = prep->width & 0xff; in write_ivf_header()
815 data[13] = (prep->width >> 8) & 0xff; in write_ivf_header()
816 data[14] = prep->height & 0xff; in write_ivf_header()
817 data[15] = (prep->height >> 8) & 0xff; in write_ivf_header()
988 MppEncPrepCfg *set = &ctx->cfg->prep; in set_parameter()
1211 MppEncPrepCfg *pre = &ctx->cfg->prep; in alloc_buffer()
1366 MppEncPrepCfg *prep = &cfg->prep; in hal_vp8e_enc_strm_code() local
1377 hw_offset.fmt = prep->format; in hal_vp8e_enc_strm_code()
1379 hw_offset.width = prep->width; in hal_vp8e_enc_strm_code()
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