154     MppEncPrepCfg *prep = &ctx->cfg->prep;  in vepu54x_h265_setup_hal_bufs()  local
160     mb_wd64 = (prep->width + 63) / 64;  in vepu54x_h265_setup_hal_bufs()
161     mb_h64 = (prep->height + 63) / 64 + 1;  in vepu54x_h265_setup_hal_bufs()
163     frame_size = MPP_ALIGN(prep->width, 16) * MPP_ALIGN(prep->height, 16);  in vepu54x_h265_setup_hal_bufs()
164     vepu5xx_set_fmt(fmt, ctx->cfg->prep.format);  in vepu54x_h265_setup_hal_bufs()
704     MppEncPrepCfg *prep = &ctx->cfg->prep;  in hal_h265e_vepu54x_prepare()  local
708     if (prep->change_res) {  in hal_h265e_vepu54x_prepare()
716         prep->change_res = 0;  in hal_h265e_vepu54x_prepare()
823     RK_U32 h = ctx->cfg->prep.height;  in setup_vepu541_intra_refresh()
824     RK_U32 w = ctx->cfg->prep.width;  in setup_vepu541_intra_refresh()
930         RK_U32 h =  ctx->cfg->prep.height;  in vepu541_h265_set_roi_regs()
931         RK_U32 w = ctx->cfg->prep.width;  in vepu541_h265_set_roi_regs()
1067     MppEncPrepCfg *prep_cfg = &ctx->cfg->prep;  in vepu541_h265_set_pp_regs()
1863     RK_S32 mb64_num = ((cfg->prep.width + 63) / 64) * ((cfg->prep.height + 63) / 64);  in vepu541_h265_set_feedback()