399     MppEncPrepCfg *prep = &cfg->prep;  in setup_hal_bufs()  local
402     RK_S32 aligned_w = MPP_ALIGN(prep->width,  alignment_w);  in setup_hal_bufs()
403     RK_S32 aligned_h = MPP_ALIGN(prep->height, alignment_h) + 16;  in setup_hal_bufs()
475     MppEncPrepCfg *prep = &ctx->cfg->prep;  in hal_h264e_vepu511_prepare()  local
479     if (prep->change_res) {  in hal_h264e_vepu511_prepare()
487         prep->change_res = 0;  in hal_h264e_vepu511_prepare()
698 static MPP_RET setup_vepu511_prep(HalVepu511RegSet *regs, MppEncPrepCfg *prep, HalEncTask *task)  in setup_vepu511_prep()  argument
702     MppFrameFormat fmt = prep->format;  in setup_vepu511_prep()
714     reg_frm->common.enc_rsl.pic_wd8_m1 = MPP_ALIGN(prep->width, 16) / 8 - 1;  in setup_vepu511_prep()
715     reg_frm->common.src_fill.pic_wfill = MPP_ALIGN(prep->width, 16) - prep->width;  in setup_vepu511_prep()
716     reg_frm->common.enc_rsl.pic_hd8_m1 = MPP_ALIGN(prep->height, 16) / 8 - 1;  in setup_vepu511_prep()
717     reg_frm->common.src_fill.pic_hfill = MPP_ALIGN(prep->height, 16) - prep->height;  in setup_vepu511_prep()
731             y_stride = MPP_ALIGN(prep->hor_stride, 64) >> 2;  in setup_vepu511_prep()
732     } else if (prep->hor_stride) {  in setup_vepu511_prep()
733         y_stride = prep->hor_stride;  in setup_vepu511_prep()
736             y_stride = prep->width * 4;  in setup_vepu511_prep()
738             y_stride = prep->width * 3;  in setup_vepu511_prep()
742             y_stride = prep->width * 2;  in setup_vepu511_prep()
744             y_stride = prep->width;  in setup_vepu511_prep()
762         const VepuRgb2YuvCfg *cfg_coeffs = get_rgb2yuv_cfg(prep->range, prep->color);  in setup_vepu511_prep()
764         hal_h264e_dbg_flow("input color range %d colorspace %d", prep->range, prep->color);  in setup_vepu511_prep()
804     reg_frm->common.src_proc.src_mirr    = prep->mirroring > 0;  in setup_vepu511_prep()
805     reg_frm->common.src_proc.src_rot     = prep->rotation;  in setup_vepu511_prep()
821     RK_S32 width_align = MPP_ALIGN(ctx->cfg->prep.width, 16);  in vepu511_h264e_save_pass1_patch()
822     RK_S32 height_align = MPP_ALIGN(ctx->cfg->prep.height, 16);  in vepu511_h264e_save_pass1_patch()
850     RK_S32 width_align = MPP_ALIGN(ctx->cfg->prep.width, 16);  in vepu511_h264e_use_pass1_patch()
851     RK_S32 height_align = MPP_ALIGN(ctx->cfg->prep.height, 16);  in vepu511_h264e_use_pass1_patch()
1575         RK_U32 mb_w = MPP_ALIGN(enc_cfg->prep.width, 16) / 16;  in setup_vepu511_split()
1576         RK_U32 mb_h = MPP_ALIGN(enc_cfg->prep.height, 16) / 16;  in setup_vepu511_split()
2135     ret = setup_vepu511_prep(regs, &ctx->cfg->prep, task);  in hal_h264e_vepu511_gen_regs()
2165                         ctx->cfg->prep.width, ctx->cfg->prep.height);  in hal_h264e_vepu511_gen_regs()