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Searched refs:sr (Results 1 – 25 of 163) sorted by relevance

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/rk3399_rockchip-uboot/arch/m68k/lib/
H A Dinterrupts.c30 unsigned short sr; in get_sr() local
32 asm volatile ("move.w %%sr,%0":"=r" (sr):); in get_sr()
34 return sr; in get_sr()
37 static __inline__ void set_sr (unsigned short sr) in set_sr() argument
39 asm volatile ("move.w %0,%%sr"::"r" (sr)); in set_sr()
70 unsigned short sr; in enable_interrupts() local
72 sr = get_sr (); in enable_interrupts()
73 set_sr (sr & ~0x0700); in enable_interrupts()
78 unsigned short sr; in disable_interrupts() local
80 sr = get_sr (); in disable_interrupts()
[all …]
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-de212/
H A Dtie.h70 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
71 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
72 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,12 , 32,0,0,0) \
73 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
74 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
75 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
76 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0)
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-dc232b/
H A Dtie.h93 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
94 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
95 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
96 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
97 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
98 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0) \
99 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,12 , 32,0,0,0) \
/rk3399_rockchip-uboot/arch/xtensa/include/asm/arch-dc233c/
H A Dtie.h94 XCHAL_SA_REG(s,1,0,0,1, acclo, 4, 4, 4,0x0210, sr,16 , 32,0,0,0) \
95 XCHAL_SA_REG(s,1,0,0,1, acchi, 4, 4, 4,0x0211, sr,17 , 8,0,0,0) \
96 XCHAL_SA_REG(s,0,0,0,1, m0, 4, 4, 4,0x0220, sr,32 , 32,0,0,0) \
97 XCHAL_SA_REG(s,0,0,0,1, m1, 4, 4, 4,0x0221, sr,33 , 32,0,0,0) \
98 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
99 XCHAL_SA_REG(s,0,0,0,1, m3, 4, 4, 4,0x0223, sr,35 , 32,0,0,0) \
100 XCHAL_SA_REG(s,0,0,0,1, scompare1, 4, 4, 4,0x020C, sr,12 , 32,0,0,0)
/rk3399_rockchip-uboot/arch/arm/mach-at91/
H A Dspl_at91.c35 if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) { in lowlevel_clock_init()
40 while (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) in lowlevel_clock_init()
52 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) in lowlevel_clock_init()
58 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) in lowlevel_clock_init()
H A Dspl_atmel.c32 while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS)) in switch_to_main_crystal_osc()
47 while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS)) in switch_to_main_crystal_osc()
/rk3399_rockchip-uboot/drivers/serial/
H A Dserial_stm32.c16 u32 sr; member
65 if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0) in stm32_serial_getc()
76 if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0) in stm32_serial_putc()
90 return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0; in stm32_serial_pending()
92 return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1; in stm32_serial_pending()
H A Dserial_stm32x7.c47 if ((readl(&usart->sr) & USART_SR_FLAG_RXNE) == 0) in stm32_serial_getc()
58 if ((readl(&usart->sr) & USART_SR_FLAG_TXE) == 0) in stm32_serial_putc()
72 return readl(&usart->sr) & USART_SR_FLAG_RXNE ? 1 : 0; in stm32_serial_pending()
74 return readl(&usart->sr) & USART_SR_FLAG_TXE ? 0 : 1; in stm32_serial_pending()
H A Dserial_msm.c61 unsigned sr; in msm_serial_fetch() local
71 sr = readl(priv->base + UARTDM_SR); in msm_serial_fetch()
73 if (sr & UARTDM_SR_RX_READY) { in msm_serial_fetch()
/rk3399_rockchip-uboot/arch/arm/mach-at91/arm926ejs/
H A Dclock.c208 while (!(readl(&pmc->sr) & AT91_PMC_LOCKA)) in at91_plla_init()
216 while (!(readl(&pmc->sr) & AT91_PMC_LOCKB)) in at91_pllb_init()
229 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) in at91_mck_init()
236 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) in at91_mck_init()
243 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) in at91_mck_init()
250 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) in at91_mck_init()
261 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB) { in at91_pllb_clk_enable()
279 while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0) { in at91_pllb_clk_disable()
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf547x_8x/
H A Dslicetimer.c45 setbits_be32(&timerp->sr, SLT_SR_ST); in __udelay()
55 setbits_be32(&timerp->sr, SLT_SR_ST); in dtimer_interrupt()
71 out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST); in timer_init()
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf52x2/
H A Dcpu.c57 out_be16(&wdt->sr, 0x5555); in watchdog_reset()
58 out_be16(&wdt->sr, 0xaaaa); in watchdog_reset()
66 out_be16(&wdt->sr, 0x5555); in watchdog_disable()
67 out_be16(&wdt->sr, 0xaaaa); in watchdog_disable()
87 out_be16(&wdt->sr, 0x5555); in watchdog_init()
88 out_be16(&wdt->sr, 0xaaaa); in watchdog_init()
/rk3399_rockchip-uboot/arch/m68k/include/asm/
H A Dptrace.h33 unsigned short sr; member
36 unsigned short sr; member
/rk3399_rockchip-uboot/drivers/mtd/
H A Dstm32_flash.c98 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY) in flash_erase()
117 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY) in flash_erase()
131 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY) in write_buff()
144 while (readl(&STM32_FLASH->sr) & STM32_FLASH_SR_BSY) in write_buff()
H A Dst_smi.c209 int sr; in smi_wait_till_ready() local
215 sr = smi_read_sr(bank); in smi_wait_till_ready()
216 if ((sr >= 0) && (!(sr & WIP_BIT))) in smi_wait_till_ready()
239 int sr; in smi_write_enable() local
258 sr = smi_read_sr(bank); in smi_write_enable()
259 if ((sr >= 0) && (sr & (1 << (bank + WM_SHIFT)))) in smi_write_enable()
/rk3399_rockchip-uboot/drivers/i2c/
H A Dat91_i2c.c29 u32 sr; in at91_wait_for_xfer() local
34 sr = readl(&reg->sr); in at91_wait_for_xfer()
35 bus->status |= sr; in at91_wait_for_xfer()
37 if (sr & TWI_SR_NACK) in at91_wait_for_xfer()
39 else if (sr & status) in at91_wait_for_xfer()
53 readl(&reg->sr); in at91_i2c_xfer_msg()
H A Dfsl_i2c.c226 while (!(readb(&base->sr) & I2C_SR_MBB)) { in fsl_i2c_fixup()
231 if (readb(&base->sr) & I2C_SR_MAL) { in fsl_i2c_fixup()
242 while (!(readb(&base->sr) & I2C_SR_MIF)) { in fsl_i2c_fixup()
250 writeb(0, &base->sr); in fsl_i2c_fixup()
273 writeb(0x0, &base->sr); /* clear status register */ in __i2c_init()
277 while (readb(&base->sr) & I2C_SR_MBB) { in __i2c_init()
295 while (readb(&base->sr) & I2C_SR_MBB) { in i2c_wait4bus()
311 csr = readb(&base->sr); in i2c_wait()
315 csr = readb(&base->sr); in i2c_wait()
317 writeb(0x0, &base->sr); in i2c_wait()
/rk3399_rockchip-uboot/drivers/mtd/spi/
H A Dspi_flash.c227 u8 sr; in spi_flash_sr_ready() local
230 ret = read_sr(flash, &sr); in spi_flash_sr_ready()
234 return !(sr & STATUS_WIP); in spi_flash_sr_ready()
251 int sr, fsr; in spi_flash_ready() local
253 sr = spi_flash_sr_ready(flash); in spi_flash_ready()
254 if (sr < 0) in spi_flash_ready()
255 return sr; in spi_flash_ready()
264 return sr && fsr; in spi_flash_ready()
838 static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs, in stm_get_locked_range() argument
845 if (!(sr & mask)) { in stm_get_locked_range()
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H A Dspi-nor-tiny.c286 int sr = read_sr(nor); in spi_nor_sr_ready() local
288 if (sr < 0) in spi_nor_sr_ready()
289 return sr; in spi_nor_sr_ready()
291 return !(sr & SR_WIP); in spi_nor_sr_ready()
305 int sr, fsr; in spi_nor_ready() local
307 sr = spi_nor_sr_ready(nor); in spi_nor_ready()
308 if (sr < 0) in spi_nor_ready()
309 return sr; in spi_nor_ready()
313 return sr && fsr; in spi_nor_ready()
/rk3399_rockchip-uboot/drivers/clk/at91/
H A Dclk-utmi.c25 if (readl(&pmc->sr) & AT91_PMC_LOCKU) in utmi_clk_enable()
34 while (!(readl(&pmc->sr) & AT91_PMC_LOCKU)) in utmi_clk_enable()
/rk3399_rockchip-uboot/arch/sh/include/asm/
H A Dptrace.h56 unsigned long sr; member
88 #define user_mode(regs) (((regs)->sr & 0x40000000)==0)
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf523x/
H A Dcpu.c67 out_be16(&wdp->sr, 0x5555); in watchdog_reset()
69 out_be16(&wdp->sr, 0xaaaa); in watchdog_reset()
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf532x/
H A Dcpu.c106 out_be16(&wdp->sr, 0x5555); in watchdog_reset()
107 out_be16(&wdp->sr, 0xaaaa); in watchdog_reset()
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dstart.S34 sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
58 sr r5, [ARC_AUX_DC_CTRL]
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dfsl_dma.h32 uint sr; /* DMA status register */ member
71 uint sr; /* DMA status register */ member

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