xref: /rk3399_rockchip-uboot/arch/arc/lib/start.S (revision f42f25dad80688886b4e0b12b8e75c86c4d350e7)
14d93617dSAlexey Brodkin/*
24d93617dSAlexey Brodkin * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
34d93617dSAlexey Brodkin *
44d93617dSAlexey Brodkin * SPDX-License-Identifier:	GPL-2.0+
54d93617dSAlexey Brodkin */
64d93617dSAlexey Brodkin
74d93617dSAlexey Brodkin#include <asm-offsets.h>
84d93617dSAlexey Brodkin#include <config.h>
94d93617dSAlexey Brodkin#include <linux/linkage.h>
104d93617dSAlexey Brodkin#include <asm/arcregs.h>
114d93617dSAlexey Brodkin
124d93617dSAlexey BrodkinENTRY(_start)
13*cf628f77SAlexey Brodkin; ARCompact devices are not supposed to be SMP so master/slave check
14*cf628f77SAlexey Brodkin; makes no sense.
15*cf628f77SAlexey Brodkin#ifdef CONFIG_ISA_ARCV2
166cba327bSAlexey Brodkin	; Non-masters will be halted immediately, they might be kicked later
176cba327bSAlexey Brodkin	; by platform code right before passing control to the Linux kernel
186cba327bSAlexey Brodkin	; in bootm.c:boot_jump_linux().
196cba327bSAlexey Brodkin	lr 	r5, [identity]
206cba327bSAlexey Brodkin	lsr	r5, r5, 8
216cba327bSAlexey Brodkin	bmsk	r5, r5, 7
226cba327bSAlexey Brodkin	cmp	r5, 0
236cba327bSAlexey Brodkin	mov.nz	r0, r5
246cba327bSAlexey Brodkin	bz	.Lmaster_proceed
256cba327bSAlexey Brodkin	flag	1
266cba327bSAlexey Brodkin	nop
276cba327bSAlexey Brodkin	nop
286cba327bSAlexey Brodkin	nop
296cba327bSAlexey Brodkin
306cba327bSAlexey Brodkin.Lmaster_proceed:
31*cf628f77SAlexey Brodkin#endif
326cba327bSAlexey Brodkin
334d93617dSAlexey Brodkin	/* Setup interrupt vector base that matches "__text_start" */
344d93617dSAlexey Brodkin	sr	__ivt_start, [ARC_AUX_INTR_VEC_BASE]
354d93617dSAlexey Brodkin
36ef639e6fSAlexey Brodkin	; Disable/enable I-cache according to configuration
37ef639e6fSAlexey Brodkin	lr	r5, [ARC_BCR_IC_BUILD]
38ef639e6fSAlexey Brodkin	breq	r5, 0, 1f		; I$ doesn't exist
39ef639e6fSAlexey Brodkin	lr	r5, [ARC_AUX_IC_CTRL]
40ef639e6fSAlexey Brodkin#ifndef CONFIG_SYS_ICACHE_OFF
41ef639e6fSAlexey Brodkin	bclr	r5, r5, 0		; 0 - Enable, 1 is Disable
42ef639e6fSAlexey Brodkin#else
43ef639e6fSAlexey Brodkin	bset	r5, r5, 0		; I$ exists, but is not used
44ef639e6fSAlexey Brodkin#endif
45ef639e6fSAlexey Brodkin	sr	r5, [ARC_AUX_IC_CTRL]
46ef639e6fSAlexey Brodkin
47ef639e6fSAlexey Brodkin1:
48ef639e6fSAlexey Brodkin	; Disable/enable D-cache according to configuration
49ef639e6fSAlexey Brodkin	lr	r5, [ARC_BCR_DC_BUILD]
50ef639e6fSAlexey Brodkin	breq	r5, 0, 1f		; D$ doesn't exist
51ef639e6fSAlexey Brodkin	lr	r5, [ARC_AUX_DC_CTRL]
52ef639e6fSAlexey Brodkin	bclr	r5, r5, 6		; Invalidate (discard w/o wback)
53ef639e6fSAlexey Brodkin#ifndef CONFIG_SYS_DCACHE_OFF
54ef639e6fSAlexey Brodkin	bclr	r5, r5, 0		; Enable (+Inv)
55ef639e6fSAlexey Brodkin#else
56ef639e6fSAlexey Brodkin	bset	r5, r5, 0		; Disable (+Inv)
57ef639e6fSAlexey Brodkin#endif
58ef639e6fSAlexey Brodkin	sr	r5, [ARC_AUX_DC_CTRL]
59ef639e6fSAlexey Brodkin
60ef639e6fSAlexey Brodkin1:
61ef639e6fSAlexey Brodkin#ifdef CONFIG_ISA_ARCV2
62ef639e6fSAlexey Brodkin	; Disable System-Level Cache (SLC)
63ef639e6fSAlexey Brodkin	lr	r5, [ARC_BCR_SLC]
64ef639e6fSAlexey Brodkin	breq	r5, 0, 1f		; SLC doesn't exist
65ef639e6fSAlexey Brodkin	lr	r5, [ARC_AUX_SLC_CTRL]
66ef639e6fSAlexey Brodkin	bclr	r5, r5, 6		; Invalidate (discard w/o wback)
67ef639e6fSAlexey Brodkin	bclr	r5, r5, 0		; Enable (+Inv)
68ef639e6fSAlexey Brodkin	sr	r5, [ARC_AUX_SLC_CTRL]
69ef639e6fSAlexey Brodkin
70ef639e6fSAlexey Brodkin1:
71ef639e6fSAlexey Brodkin#endif
72ef639e6fSAlexey Brodkin
73ecc30663SAlbert ARIBAUD	/* Establish C runtime stack and frame */
744d93617dSAlexey Brodkin	mov	%sp, CONFIG_SYS_INIT_SP_ADDR
754d93617dSAlexey Brodkin	mov	%fp, %sp
764d93617dSAlexey Brodkin
77ecc30663SAlbert ARIBAUD	/* Allocate reserved area from current top of stack */
78f56d625eSAlexey Brodkin	mov	%r0, %sp
79ecc30663SAlbert ARIBAUD	bl	board_init_f_alloc_reserve
80ecc30663SAlbert ARIBAUD	/* Set stack below reserved area, adjust frame pointer accordingly */
81f56d625eSAlexey Brodkin	mov	%sp, %r0
82f56d625eSAlexey Brodkin	mov	%fp, %sp
83f56d625eSAlexey Brodkin
84ecc30663SAlbert ARIBAUD	/* Initialize reserved area - note: r0 already contains address */
85ecc30663SAlbert ARIBAUD	bl	board_init_f_init_reserve
86ecc30663SAlbert ARIBAUD
874d93617dSAlexey Brodkin	/* Zero the one and only argument of "board_init_f" */
884d93617dSAlexey Brodkin	mov_s	%r0, 0
894d93617dSAlexey Brodkin	j	board_init_f
904d93617dSAlexey BrodkinENDPROC(_start)
914d93617dSAlexey Brodkin
924d93617dSAlexey Brodkin/*
933fb80163SAlexey Brodkin * void board_init_f_r_trampoline(stack-pointer address)
944d93617dSAlexey Brodkin *
954d93617dSAlexey Brodkin * This "function" does not return, instead it continues in RAM
964d93617dSAlexey Brodkin * after relocating the monitor code.
974d93617dSAlexey Brodkin *
983fb80163SAlexey Brodkin * r0 = new stack-pointer
994d93617dSAlexey Brodkin */
1003fb80163SAlexey BrodkinENTRY(board_init_f_r_trampoline)
1013fb80163SAlexey Brodkin	/* Set up the stack- and frame-pointers */
1023fb80163SAlexey Brodkin	mov	%sp, %r0
1034d93617dSAlexey Brodkin	mov	%fp, %sp
1044d93617dSAlexey Brodkin
1054d93617dSAlexey Brodkin	/* Update position of intterupt vector table */
1063fb80163SAlexey Brodkin	lr	%r0, [ARC_AUX_INTR_VEC_BASE]
1073fb80163SAlexey Brodkin	ld	%r1, [%r25, GD_RELOC_OFF]
1083fb80163SAlexey Brodkin	add	%r0, %r0, %r1
1093fb80163SAlexey Brodkin	sr	%r0, [ARC_AUX_INTR_VEC_BASE]
1104d93617dSAlexey Brodkin
1113fb80163SAlexey Brodkin	/* Re-enter U-Boot by calling board_init_f_r */
1123fb80163SAlexey Brodkin	j	board_init_f_r
1133fb80163SAlexey BrodkinENDPROC(board_init_f_r_trampoline)
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