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Searched refs:reg_addr (Results 1 – 25 of 44) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-mvebu/serdes/a38x/
H A Dseq_exec.c33 u32 unit_base_reg, unit_offset, data, mask, reg_data, reg_addr; in write_op_execute() local
49 reg_addr = unit_base_reg + unit_offset * serdes_num; in write_op_execute()
52 printf("Write: 0x%x: 0x%x (mask 0x%x) - ", reg_addr, data, mask); in write_op_execute()
55 reg_data = reg_read(reg_addr); in write_op_execute()
61 reg_write(reg_addr, reg_data); in write_op_execute()
88 u32 reg_addr, reg_data; in poll_op_execute() local
106 reg_addr = unit_base_reg + unit_offset * serdes_num; in poll_op_execute()
110 printf("Poll: 0x%x: 0x%x (mask 0x%x)\n", reg_addr, data, mask); in poll_op_execute()
114 reg_data = reg_read(reg_addr) & mask; in poll_op_execute()
/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_training_pbs.c53 int reg_addr = 0; in ddr3_tip_pbs() local
75 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
80 read_adll_value(nominal_adll, reg_addr, MASK_ALL_BITS); in ddr3_tip_pbs()
191 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
197 reg_addr, 0x1f)); in ddr3_tip_pbs()
198 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
204 reg_addr, 0x1f)); in ddr3_tip_pbs()
251 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
259 DDR_PHY_DATA, reg_addr, in ddr3_tip_pbs()
261 reg_addr = (pbs_mode == PBS_RX_MODE) ? in ddr3_tip_pbs()
[all …]
H A Dddr3_training_ip_flow.h291 u32 if_id, u32 reg_addr, u32 data_value, u32 mask);
296 u32 if_id, u32 reg_addr, u32 *data, u32 mask);
301 u32 reg_addr, u32 data_value, u32 reg_mask);
303 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr,
307 enum hws_ddr_phy e_phy_type, u32 reg_addr,
313 int ddr3_tip_ext_read(u32 dev_num, u32 if_id, u32 reg_addr,
315 int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr,
341 int reg_addr, u32 mask);
343 int reg_addr, u32 mask);
345 int reg_addr);
H A Dddr3_a38x.c286 u32 if_id, u32 reg_addr, u32 data_value, in ddr3_tip_a38x_if_write() argument
293 (dev_num, ACCESS_TYPE_UNICAST, if_id, reg_addr, in ddr3_tip_a38x_if_write()
298 reg_write(reg_addr, data_value); in ddr3_tip_a38x_if_write()
311 u32 if_id, u32 reg_addr, u32 *data, u32 mask) in ddr3_tip_a38x_if_read() argument
313 *data = reg_read(reg_addr) & mask; in ddr3_tip_a38x_if_read()
683 int ddr3_tip_ext_read(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_read() argument
689 data[burst_num] = readl(reg_addr + 4 * burst_num); in ddr3_tip_ext_read()
697 int ddr3_tip_ext_write(u32 dev_num, u32 if_id, u32 reg_addr, in ddr3_tip_ext_write() argument
702 writel(data[burst_num], reg_addr + 4 * burst_num); in ddr3_tip_ext_write()
H A Dddr3_training_hw_algo.c170 u32 reg_addr = 0xa8; in ddr3_tip_vref() local
208 DDR_PHY_DATA, reg_addr, &val)); in ddr3_tip_vref()
212 pup, DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
382 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
390 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
497 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
505 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
540 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
548 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
570 DDR_PHY_DATA, reg_addr, in ddr3_tip_vref()
[all …]
H A Dddr3_debug.c100 u32 if_id, reg_addr, data_value, bus_id; in ddr3_tip_reg_dump() local
105 for (reg_addr = 0x1400; reg_addr < 0x19f0; reg_addr += 4) { in ddr3_tip_reg_dump()
106 printf("0x%x ", reg_addr); in ddr3_tip_reg_dump()
111 if_id, reg_addr, read_data, in ddr3_tip_reg_dump()
119 for (reg_addr = 0; reg_addr <= 0xff; reg_addr++) { in ddr3_tip_reg_dump()
120 printf("0x%x ", reg_addr); in ddr3_tip_reg_dump()
130 DDR_PHY_DATA, reg_addr, in ddr3_tip_reg_dump()
141 DDR_PHY_CONTROL, reg_addr, in ddr3_tip_reg_dump()
657 int reg_addr, u32 mask) in read_adll_value() argument
676 DDR_PHY_DATA, reg_addr, in read_adll_value()
[all …]
H A Dddr3_training_ip_prv_if.h43 u32 reg_addr, u32 data, u32 mask);
46 u32 reg_addr, u32 *data, u32 mask);
50 enum hws_ddr_phy phy_type, u32 reg_addr, u32 data);
53 u32 phy_id, enum hws_ddr_phy phy_type, u32 reg_addr, u32 *data);
H A Dddr3_hws_hw_training.h12 u32 reg_addr; member
H A Dddr3_init.c456 u32 ddr3_get_static_mc_value(u32 reg_addr, u32 offset1, u32 mask1, in ddr3_get_static_mc_value() argument
461 reg = reg_read(reg_addr); in ddr3_get_static_mc_value()
566 while (config_table_ptr[i].reg_addr != 0) { in ddr3_new_tip_dlb_config()
567 reg_write(config_table_ptr[i].reg_addr, in ddr3_new_tip_dlb_config()
H A Dddr3_init.h317 int ddr3_tip_reg_write(u32 dev_num, u32 reg_addr, u32 data);
318 int ddr3_tip_reg_read(u32 dev_num, u32 reg_addr, u32 *data, u32 reg_mask);
328 u32 if_id, u32 reg_addr, u32 *data, u32 mask);
330 u32 if_id, u32 reg_addr, u32 data, u32 mask);
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.h29 unsigned int reg_addr,
32 unsigned int reg_addr,
35 unsigned int reg_addr,
39 unsigned int reg_addr,
44 unsigned int reg_addr);
47 unsigned int reg_addr, unsigned int *data);
50 unsigned int reg_addr, unsigned int count,
H A Dexynos_dp_lowlevel.c477 unsigned int reg_addr, in exynos_dp_write_byte_to_dpcd() argument
487 reg = AUX_ADDR_7_0(reg_addr); in exynos_dp_write_byte_to_dpcd()
489 reg = AUX_ADDR_15_8(reg_addr); in exynos_dp_write_byte_to_dpcd()
491 reg = AUX_ADDR_19_16(reg_addr); in exynos_dp_write_byte_to_dpcd()
517 unsigned int reg_addr, in exynos_dp_read_byte_from_dpcd() argument
528 reg = AUX_ADDR_7_0(reg_addr); in exynos_dp_read_byte_from_dpcd()
530 reg = AUX_ADDR_15_8(reg_addr); in exynos_dp_read_byte_from_dpcd()
532 reg = AUX_ADDR_19_16(reg_addr); in exynos_dp_read_byte_from_dpcd()
556 unsigned int reg_addr, in exynos_dp_write_bytes_to_dpcd() argument
582 reg = AUX_ADDR_7_0(reg_addr + start_offset); in exynos_dp_write_bytes_to_dpcd()
[all …]
/rk3399_rockchip-uboot/drivers/video/bridge/
H A Danx6345.c28 unsigned char reg_addr, unsigned char value) in anx6345_write() argument
36 buf[0] = reg_addr; in anx6345_write()
43 __func__, reg_addr, value, ret); in anx6345_write()
51 unsigned char reg_addr, unsigned char *value) in anx6345_read() argument
59 addr = reg_addr; in anx6345_read()
69 __func__, (int)reg_addr, value, ret); in anx6345_read()
77 static int anx6345_write_r0(struct udevice *dev, unsigned char reg_addr, in anx6345_write_r0() argument
82 return anx6345_write(dev, chip->chip_addr, reg_addr, value); in anx6345_write_r0()
85 static int anx6345_read_r0(struct udevice *dev, unsigned char reg_addr, in anx6345_read_r0() argument
90 return anx6345_read(dev, chip->chip_addr, reg_addr, value); in anx6345_read_r0()
[all …]
H A Dps862x.c37 unsigned char reg_addr, unsigned char value) in ps8622_write() argument
46 buf[0] = reg_addr; in ps8622_write()
53 __func__, reg_addr, value, ret); in ps8622_write()
/rk3399_rockchip-uboot/cmd/
H A Dpci.c70 u32 reg_addr; in pci_bar_show() local
91 reg_addr = PCI_BASE_ADDRESS_0; in pci_bar_show()
93 dm_pci_read_config32(dev, reg_addr, &base_low); in pci_bar_show()
94 dm_pci_write_config32(dev, reg_addr, 0xffffffff); in pci_bar_show()
95 dm_pci_read_config32(dev, reg_addr, &size_low); in pci_bar_show()
96 dm_pci_write_config32(dev, reg_addr, base_low); in pci_bar_show()
97 reg_addr += 4; in pci_bar_show()
109 dm_pci_read_config32(dev, reg_addr, &base_high); in pci_bar_show()
110 dm_pci_write_config32(dev, reg_addr, 0xffffffff); in pci_bar_show()
111 dm_pci_read_config32(dev, reg_addr, &size_high); in pci_bar_show()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-omap2/
H A Dvc.c94 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data) in omap_vc_bypass_send_value() argument
104 reg_addr &= PRM_VC_VAL_BYPASS_REGADDR_MASK; in omap_vc_bypass_send_value()
109 reg_addr << PRM_VC_VAL_BYPASS_REGADDR_SHIFT | in omap_vc_bypass_send_value()
/rk3399_rockchip-uboot/drivers/net/phy/
H A Dcortina.c127 char reg_addr[0x50] = {0}; in cs4340_upload_firmware() local
208 memcpy(reg_addr, line_temp, i); in cs4340_upload_firmware()
210 strim(reg_addr); in cs4340_upload_firmware()
212 fw_temp.reg_addr = (simple_strtoul(reg_addr, NULL, 0)) & 0xffff; in cs4340_upload_firmware()
215 phy_write(phydev, 0x00, fw_temp.reg_addr, fw_temp.reg_value); in cs4340_upload_firmware()
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Drsb.c145 int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data) in rsb_write() argument
151 writel(reg_addr, &rsb->addr); in rsb_write()
158 int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data) in rsb_read() argument
165 writel(reg_addr, &rsb->addr); in rsb_read()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/
H A Drsb.h52 int rsb_write(const u16 runtime_device_addr, const u8 reg_addr, u8 data);
53 int rsb_read(const u16 runtime_device_addr, const u8 reg_addr, u8 *data);
/rk3399_rockchip-uboot/arch/arm/mach-omap2/am33xx/
H A Dboard.c162 static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr) in am33xx_usb_set_phy_power() argument
165 clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN, in am33xx_usb_set_phy_power()
168 clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN); in am33xx_usb_set_phy_power()
/rk3399_rockchip-uboot/drivers/ddr/marvell/axp/
H A Dddr3_init.c790 while (ddr_mode->vals[j].reg_addr != 0) { in ddr3_static_training_init()
792 reg_write(ddr_mode->vals[j].reg_addr, in ddr3_static_training_init()
795 if (ddr_mode->vals[j].reg_addr == in ddr3_static_training_init()
816 u32 ddr3_get_static_mc_value(u32 reg_addr, u32 offset1, u32 mask1, u32 offset2, in ddr3_get_static_mc_value() argument
821 reg = reg_read(reg_addr); in ddr3_get_static_mc_value()
889 while (ddr_mode->regs[j].reg_addr != 0) { in ddr3_static_mc_init()
890 reg_write(ddr_mode->regs[j].reg_addr, in ddr3_static_mc_init()
892 if (ddr_mode->regs[j].reg_addr == in ddr3_static_mc_init()
/rk3399_rockchip-uboot/drivers/irq/
H A Dvirq.c172 int reg_addr; in reg_base_get() local
175 reg_addr = reg_base + (idx * desc->unalign_reg_stride); in reg_base_get()
177 reg_addr = reg_base + in reg_base_get()
179 reg_addr += (idx - desc->unalign_reg_idx) * desc->reg_stride; in reg_base_get()
182 return reg_addr; in reg_base_get()
/rk3399_rockchip-uboot/include/
H A Dcortina.h72 unsigned short reg_addr; member
/rk3399_rockchip-uboot/drivers/net/
H A Dag7xxx.c198 u32 reg_addr; in ag7xxx_switch_reg_read() local
206 reg_addr = 0x10; in ag7xxx_switch_reg_read()
209 reg_addr = 0x00; in ag7xxx_switch_reg_read()
213 ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, reg >> 9); in ag7xxx_switch_reg_read()
238 u32 reg_addr; in ag7xxx_switch_reg_write() local
245 reg_addr = 0x10; in ag7xxx_switch_reg_write()
248 reg_addr = 0x00; in ag7xxx_switch_reg_write()
252 ret = ag7xxx_switch_write(bus, phy_addr, reg_addr, reg >> 9); in ag7xxx_switch_reg_write()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap4/
H A Dsys_proto.h67 int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);

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