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Searched refs:r3 (Results 1 – 25 of 106) sorted by relevance

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/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/
H A Dcache.S36 mfspr r3,HID0
37 ori r3,r3,HID0_ICFI
38 mtspr HID0,r3
46 mfspr r3,HID0
47 ori r3,r3,HID0_DCFI
48 mtspr HID0,r3
56 lis r3,0
59 cmp 0,1,r3,r5
61 lwz r5,0(r3)
63 addi r3,r3,0x4
[all …]
H A Drelease.S68 addis r3, r0, L2_INIT@h
69 ori r3, r3, L2_INIT@l
71 mtspr l2cr, r3
76 mfspr r3, l2cr
77 rlwinm. r3, r3, 0, 0, 0
80 mfspr r3, l2cr
81 rlwinm r3, r3, 0, 1, 31
87 mtspr l2cr, r3
89 1: mfspr r3, l2cr
90 oris r3, r3, L2CR_L2I@h
[all …]
H A Dstart.S92 addi r3,r1,STACK_FRAME_OVERHEAD
99 addi r3,r1,STACK_FRAME_OVERHEAD
160 lis r3, L2_INIT@h
161 ori r3, r3, L2_INIT@l
162 mtspr l2cr, r3
171 lis r3, CONFIG_SYS_MONITOR_BASE_EARLY@h
172 ori r3, r3, CONFIG_SYS_MONITOR_BASE_EARLY@l
173 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
174 mtlr r3
200 lis r3,addr_trans_enabled@h
[all …]
/rk3399_rockchip-uboot/examples/standalone/
H A Dppc_longjmp.S24 lwz r1,(JB_GPR1*4)(r3)
25 lwz r2,(JB_GPR2*4)(r3)
26 lwz r0,(JB_LR*4)(r3)
27 lwz r14,((JB_GPRS+0)*4)(r3)
28 FP( lfd 14,((JB_FPRS+0*2)*4)(r3))
29 lwz r15,((JB_GPRS+1)*4)(r3)
30 FP( lfd 15,((JB_FPRS+1*2)*4)(r3))
31 lwz r16,((JB_GPRS+2)*4)(r3)
32 FP( lfd 16,((JB_FPRS+2*2)*4)(r3))
33 lwz r17,((JB_GPRS+3)*4)(r3)
[all …]
/rk3399_rockchip-uboot/drivers/rknand/
H A Drk_zftl_arm_v7.S31 movs r3, #0
34 cmp r3, r2
39 ldrb r5, [r0, r3] @ zero_extendqisi2
40 ldrb r4, [r1, r3] @ zero_extendqisi2
41 adds r3, r3, #1
44 mov r0, r3
59 push {r3, r4, r5, r6, r7, lr}
61 ldr r3, .L16
63 ldrb r3, [r3] @ zero_extendqisi2
64 cbz r3, .L7
[all …]
H A Drk_ftl_arm_v7.S31 ldr r3, .L2
33 ldr r4, [r3, r0, lsl #3]
34 add r3, r3, r0, lsl #3
36 ldrb r3, [r3, #4] @ zero_extendqisi2
37 add r4, r4, r3, lsl #8
38 movs r3, #122
39 str r3, [r4, #2056]
41 ldr r3, [r4, #2048]
43 and r3, r3, #15
45 cmp r0, r3
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/
H A Drelease.S31 lis r3, HID0_EMCP@h /* enable machine check */
33 ori r3,r3,HID0_TBEN@l /* enable Timebase */
36 ori r3,r3,HID0_ENMAS7@l /* enable MAS7 updates */
38 mtspr SPRN_HID0,r3
41 li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
47 ori r3, r3, HID1_MBDD@l
49 mtspr SPRN_HID1,r3
53 mfspr r3,SPRN_HDBCR1
54 oris r3,r3,0x0100
55 mtspr SPRN_HDBCR1,r3
[all …]
H A Dstart.S88 mr r24, r3
91 mfspr r3,SPRN_SVR
92 rlwinm r3,r3,0,0xff
94 cmpw r3,r4
99 cmpw r3,r4
111 mfspr r3,SPRN_HDBCR0
113 rlwimi r3,r4,0,0x1f8
114 mtspr SPRN_HDBCR0,r3
121 mfspr r3, SPRN_HDBCR0
122 oris r3, r3, 0x0080
[all …]
/rk3399_rockchip-uboot/board/freescale/mx35pdk/
H A Dlowlevel_init.S60 ldrhs r3, =CCM_MPLL_532_HZ
64 ldrne r3, =CCM_MPLL_532_HZ /* consumer path*/
65 ldreq r3, =CCM_MPLL_399_HZ /* auto path*/
67 str r3, [r0, #CLKCTL_MPCTL]
92 mov r3, #0x2000
93 str r3, [r0, #0x0]
94 str r3, [r0, #0x8]
112 ldr r3, =ESDCTL_DELAY_LINE5
113 str r3, [r0, #0x30]
150 mov r3, #0xE
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/
H A Dstart.S111 mfmsr r3
112 andi. r0, r3, (MSR_IR | MSR_DR)
114 andc r3, r3, r0
116 mtspr SRR1, r3
122 stfd 1, 0(r3)
127 lfd 1, 0(r3)
174 lis r3, CONFIG_SYS_IMMR@h
175 ori r3, r3, CONFIG_SYS_IMMR@l
180 stw r3, IMMRBAR(r4)
184 lwz r6, IMMRBAR(r3)
[all …]
/rk3399_rockchip-uboot/drivers/rkflash/
H A Drk_sftl_arm_v7.S29 push {r3, r4, r5, r6, r7, r8, r10, lr}
31 ldr r3, .L3
37 ldrh r4, [r3, #8]
39 ldrh r5, [r3, #10]
40 ldrh r3, [r3, #14]
41 cmp r3, #4
55 pop {r3, r4, r5, r6, r7, r8, r10, pc}
77 uxth r3, r1
80 subs r0, r3, #1
113 ldr r3, .L10
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-orion5x/
H A Dlowlevel_init.S80 ldr r3, =0xD0000000
81 add r3, r3, #0x20000
82 str r4, [r3, #0x80]
85 add r3, r4, #0x01000
89 str r6, [r3, #0x480]
92 add r3, r4, #0x31000
96 str r6, [r3, #0xd00]
99 add r3, r4, #0x01000
103 str r6, [r3, #0x504]
104 str r6, [r3, #0x50C]
[all …]
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dstrchr-700.S21 mov_s %r3, 0x01010101
28 asl %r7, %r3, %r7
30 lsr %r7, %r3, %r7
33 ror %r4, %r3
61 ror %r4, %r3
64 sub %r12, %r2, %r3
70 sub %r12, %r6, %r3
86 sub %r3, %r7, 1
87 bic %r3, %r3, %r7
88 norm %r2, %r3
[all …]
H A Dmemcpy-700.S10 or %r3, %r0, %r1
11 asl_s %r3, %r3, 30
13 brls.d %r2, %r3, .Lcopy_bytewise
14 sub.f %r3, %r2, 1
16 asr.f %lp_count, %r3, 3
17 bbit0.d %r3, 2, .Lnox4
23 ld_s %r3, [%r1, 4]
26 st.ab %r3, [%r5, 4]
29 ld %r3, [%r5, 0]
33 xor_s %r12, %r12, %r3
[all …]
H A Dstrcpy-700.S26 ld_s %r3, [%r1, 0]
30 sub %r2, %r3, %r8
31 bic_s %r2, %r2, %r3
34 mov_s %r4,%r3
37 ld.a %r3, [%r1, 4]
41 sub %r2, %r3, %r8
42 bic_s %r2, %r2, %r3
45 st.ab %r3, [%r10, 4]
50 mov_s %r3, %r4
52 r3z: bmsk.f %r1, %r3, 7
[all …]
H A Dstrcmp.S26 ld.ab %r3, [%r1, 4]
32 breq %r2 ,%r3, .Lwordloop
34 xor %r0, %r2, %r3 /* mask for difference */
40 and_s %r3, %r3, %r0
42 cmp_s %r2, %r3
50 xor %r0, %r2, %r3 /* mask for difference */
57 and_s %r3, %r3, %r0
58 sub.f %r0, %r2, %r3
78 or_s %r3, %r3, %r0 /* ... high estimate r3 so that r2 > r3 will */
79 cmp_s %r3, %r2 /* ... be independent of trailing garbage */
[all …]
/rk3399_rockchip-uboot/arch/powerpc/lib/
H A Dppccache.S24 dcbf r0,r3
35 dcbi r0,r3
47 dcbz r0,r3
70 andc r3,r3,r5
71 subf r4,r3,r4
77 1: dcbf 0,r3
78 addi r3,r3,L1_CACHE_BYTES
94 andc r3,r3,r5
95 subf r4,r3,r4
102 1: dcbi 0,r3
[all …]
H A Dppcstring.S13 addi r5,r3,-1
26 addi r6,r3,-1
36 addi r5,r3,-1
50 addi r5,r3,-1
52 1: lbzu r3,1(r5)
53 cmpwi 1,r3,0
55 subf. r3,r0,r3
62 addi r4,r3,-1
66 subf r3,r3,r4
73 addi r6,r3,-4
[all …]
/rk3399_rockchip-uboot/post/lib_powerpc/
H A Dasm.S26 mtlr r3
27 mr r3, r4
49 mtlr r3
50 mr r3, r4
72 mtlr r3
73 mr r3, r5
78 stw r3, 0(r4)
93 mtlr r3
94 mr r3, r5
98 stw r3, 0(r4)
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/
H A Dstart.S73 lis r3, CONFIG_SYS_IMMR@h /* position IMMR */
74 mtspr 638, r3
78 li r3, MSR_KERNEL /* Set ME, RI flags */
79 mtmsr r3
80 mtspr SRR1, r3 /* Make SRR1 match MSR */
82 mfspr r3, ICR /* clear Interrupt Cause Register */
95 mfspr r3, IC_CST /* Clear error bits */
96 mfspr r3, DC_CST
98 lis r3, IDC_UNALL@h /* Unlock all */
99 mtspr IC_CST, r3
[all …]
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx6/
H A Dmx6_plugin.S47 ldr r3, =ROM_VERSION_OFFSET
48 ldr r4, [r3]
51 ldr r3, =0x00900b00
53 str r4, [r3, #0x5c]
55 ldr r3, =0x00900800
57 str r4, [r3, #0xc0]
65 ldr r3, =ROM_VERSION_OFFSET
66 ldr r4, [r3]
68 ldr r3, =ROM_VERSION_TO12
69 cmp r4, r3
[all …]
/rk3399_rockchip-uboot/board/freescale/mx7ulp_evk/
H A Dplugin.S11 ldr r3, =0x00000000
12 str r3, [r2, #0xdc]
15 ldr r3, =0x01000020
16 str r3, [r2, #0x40]
17 ldr r3, =0x01000000
18 str r3, [r2, #0x500]
19 ldr r3, =0x80808080
20 str r3, [r2, #0x50c]
21 ldr r3, =0x00140000
22 str r3, [r2, #0x508]
[all …]
/rk3399_rockchip-uboot/arch/nios2/cpu/
H A Dexceptions.S28 stw r3, 12(sp)
70 movhi r3, %hi(external_interrupt)
71 ori r3, r3, %lo(external_interrupt)
73 callr r3
79 ldw r3, 116(sp)
80 addi r3, r3, -4
81 stw r3, 116(sp)
86 movhi r3, %hi(OPC_TRAP)
87 ori r3, r3, %lo(OPC_TRAP)
90 bne r1, r3, 1f
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-at91/arm926ejs/
H A Dlowlevel_init.S47 ldr r3, [r0], #4
48 str r3, [r1]
77 ldr r3, [r2]
78 and r3, r4, r3
79 cmp r3, #AT91_PMC_IXR_MOSCS
95 ldr r3, [r2]
96 and r3, r4, r3
97 cmp r3, #AT91_PMC_IXR_LOCKA
115 ldr r3, [r2]
116 and r3, r4, r3
[all …]
/rk3399_rockchip-uboot/arch/arm/lib/
H A Dmemset.S24 ands r3, r0, #3 @ 1 unaligned?
32 mov r3, r1
46 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
47 stmiage ip!, {r1, r3, r8, lr}
48 stmiage ip!, {r1, r3, r8, lr}
49 stmiage ip!, {r1, r3, r8, lr}
56 stmiane ip!, {r1, r3, r8, lr}
57 stmiane ip!, {r1, r3, r8, lr}
59 stmiane ip!, {r1, r3, r8, lr}
92 stmiage ip!, {r1, r3-r8, lr}
[all …]

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