Lines Matching refs:r3
73 lis r3, CONFIG_SYS_IMMR@h /* position IMMR */
74 mtspr 638, r3
78 li r3, MSR_KERNEL /* Set ME, RI flags */
79 mtmsr r3
80 mtspr SRR1, r3 /* Make SRR1 match MSR */
82 mfspr r3, ICR /* clear Interrupt Cause Register */
95 mfspr r3, IC_CST /* Clear error bits */
96 mfspr r3, DC_CST
98 lis r3, IDC_UNALL@h /* Unlock all */
99 mtspr IC_CST, r3
100 mtspr DC_CST, r3
102 lis r3, IDC_INVALL@h /* Invalidate all */
103 mtspr IC_CST, r3
104 mtspr DC_CST, r3
106 lis r3, IDC_DISABLE@h /* Disable data cache */
107 mtspr DC_CST, r3
109 lis r3, IDC_ENABLE@h /* Enable instruction cache */
110 mtspr IC_CST, r3
122 lis r3, CONFIG_SYS_MONITOR_BASE@h
123 ori r3, r3, CONFIG_SYS_MONITOR_BASE@l
124 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
125 mtlr r3
133 lis r3, CONFIG_SYS_IMMR@h /* pass IMMR as arg1 to C routine */
134 ori r1, r3, CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in internal DPRAM */
192 addi r3,r1,STACK_FRAME_OVERHEAD
199 addi r3,r1,STACK_FRAME_OVERHEAD
323 mr r1, r3 /* Set new stack pointer */
328 mr r3, r5 /* Destination Address */
353 cmplw cr1,r3,r4
362 la r7,-4(r3)
370 add r7,r3,r0
380 add r5,r3,r5
383 andc r3,r3,r0
384 mr r4,r3
390 mr r4,r3
416 la r3,GOT(_GOT2_TABLE_)
419 sub r11,r3,r11
420 addi r3,r3,-4
421 1: lwzu r0,4(r3)
425 stw r0,0(r3)
433 lwz r3,GOT(_FIXUP_TABLE_)
436 addi r3,r3,-4
438 3: lwzu r4,4(r3)
442 stw r4,0(r3)
451 lwz r3,GOT(__bss_start)
454 cmplw 0, r3, r4
459 stw r0, 0(r3)
460 addi r3, r3, 4
461 cmplw 0, r3, r4
465 mr r3, r9 /* Global Data pointer */