| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | fsl_ifc_spl.c | 70 struct fsl_ifc_runtime *ifc = runtime_regs_address(); in nand_wait() local
80 status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); in nand_wait()
90 eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]); in nand_wait()
97 ifc_out32(&ifc->ifc_nand.nand_evter_stat, status); in nand_wait()
111 struct fsl_ifc_runtime *ifc = NULL; in nand_spl_load_image() local
128 ifc = runtime_regs_address(); in nand_spl_load_image()
163 ifc_out32(&ifc->ifc_nand.ncfgr, 0x0); in nand_spl_load_image()
166 ifc_out32(&ifc->ifc_nand.nand_evter_stat, 0xffffffff); in nand_spl_load_image()
170 ifc_out32(&ifc->ifc_nand.nand_fir0, in nand_spl_load_image()
176 ifc_out32(&ifc->ifc_nand.nand_fir1, 0x0); in nand_spl_load_image()
[all …]
|
| H A D | fsl_ifc_nand.c | 227 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs; in set_addr() local
233 ifc_out32(&ifc->ifc_nand.row0, page_addr); in set_addr()
234 ifc_out32(&ifc->ifc_nand.col0, (oob ? IFC_NAND_COL_MS : 0) | column); in set_addr()
261 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs; in fsl_ifc_run_command() local
268 ifc_out32(&ifc->ifc_nand.nand_csel, priv->bank << IFC_NAND_CSEL_SHIFT); in fsl_ifc_run_command()
271 ifc_out32(&ifc->ifc_nand.nandseq_strt, in fsl_ifc_run_command()
278 ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); in fsl_ifc_run_command()
284 ifc_out32(&ifc->ifc_nand.nand_evter_stat, ctrl->status); in fsl_ifc_run_command()
298 eccstat_regs = ifc->ifc_nand.nand_eccstat; in fsl_ifc_run_command()
336 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs; in fsl_ifc_do_read() local
[all …]
|
| /rk3399_rockchip-uboot/board/freescale/p1010rdb/ |
| H A D | spl.c | 29 struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; in board_init_f() local
34 setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); in board_init_f()
|
| H A D | p1010rdb.c | 80 struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; in board_early_init_f() local
82 setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); in board_early_init_f()
|
| H A D | README.P1010RDB-PB | 122 run 'mux ifc' in U-Boot to validate IFC with invalidating SDHC.
125 set 'ifc' in hwconfig and save it.
|
| /rk3399_rockchip-uboot/board/freescale/c29xpcie/ |
| H A D | c29xpcie.c | 41 struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; in board_early_init_f() local
44 setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); in board_early_init_f()
|
| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | fsl-ls1043a-rdb.dts | 66 &ifc {
85 compatible = "fsl,ifc-nand";
|
| H A D | fsl-ls1043a-qds.dtsi | 133 &ifc {
152 compatible = "fsl,ifc-nand";
|
| H A D | ls1021a-twr.dtsi | 63 &ifc {
|
| H A D | ls1021a-iot.dtsi | 60 &ifc {
|
| H A D | fsl-ls1046a.dtsi | 76 ifc: ifc@1530000 { label
77 compatible = "fsl,ifc", "simple-bus";
|
| H A D | fsl-ls1043a.dtsi | 76 ifc: ifc@1530000 { label
77 compatible = "fsl,ifc", "simple-bus";
|
| H A D | ls1021a.dtsi | 79 ifc: ifc@1530000 { label
80 compatible = "fsl,ifc", "simple-bus";
|
| H A D | ls1021a-qds.dtsi | 114 &ifc {
|
| /rk3399_rockchip-uboot/board/freescale/bsc9132qds/ |
| H A D | bsc9132qds.c | 39 struct fsl_ifc ifc = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL}; in board_early_init_f() local
41 setbits_be32(&ifc.gregs->ifc_gcr, 1 << IFC_GCR_TBCTL_TRN_TIME_SHIFT); in board_early_init_f()
|
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | u-boot-spl.lds | 70 /* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
|
| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/ |
| H A D | sha1_ce_core.S | 38 .ifc \ev, ev
|