1c97cd1baSScott Wood/* 2c97cd1baSScott Wood * (C) Copyright 2006 3c97cd1baSScott Wood * Wolfgang Denk, DENX Software Engineering, wd@denx.de 4c97cd1baSScott Wood * 5c97cd1baSScott Wood * Copyright 2009 Freescale Semiconductor, Inc. 6c97cd1baSScott Wood * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 8c97cd1baSScott Wood */ 9c97cd1baSScott Wood 10*6f2ed0e9SMasahiro Yamada#include "config.h" 11c97cd1baSScott Wood 12c97cd1baSScott WoodOUTPUT_ARCH(powerpc) 135df572f0SYing Zhang#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 145df572f0SYing ZhangPHDRS 155df572f0SYing Zhang{ 165df572f0SYing Zhang text PT_LOAD; 175df572f0SYing Zhang bss PT_LOAD; 185df572f0SYing Zhang} 195df572f0SYing Zhang#endif 20c97cd1baSScott WoodSECTIONS 21c97cd1baSScott Wood{ 22c97cd1baSScott Wood . = CONFIG_SPL_TEXT_BASE; 23c97cd1baSScott Wood .text : { 24c97cd1baSScott Wood *(.text*) 25c97cd1baSScott Wood } 26c97cd1baSScott Wood _etext = .; 27c97cd1baSScott Wood 28c97cd1baSScott Wood .reloc : { 29c97cd1baSScott Wood _GOT2_TABLE_ = .; 30c97cd1baSScott Wood KEEP(*(.got2)) 31c97cd1baSScott Wood KEEP(*(.got)) 32c97cd1baSScott Wood _FIXUP_TABLE_ = .; 33c97cd1baSScott Wood KEEP(*(.fixup)) 34c97cd1baSScott Wood } 35c97cd1baSScott Wood __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; 36c97cd1baSScott Wood __fixup_entries = (. - _FIXUP_TABLE_) >> 2; 37c97cd1baSScott Wood 38c97cd1baSScott Wood . = ALIGN(8); 39c97cd1baSScott Wood .data : { 40c97cd1baSScott Wood *(.rodata*) 41c97cd1baSScott Wood *(.data*) 42c97cd1baSScott Wood *(.sdata*) 43c97cd1baSScott Wood } 44c97cd1baSScott Wood _edata = .; 45c97cd1baSScott Wood 4681b867aaSYing Zhang . = ALIGN(4); 4781b867aaSYing Zhang .u_boot_list : { 4881b867aaSYing Zhang KEEP(*(SORT(.u_boot_list*))); 4981b867aaSYing Zhang } 5081b867aaSYing Zhang 51bb0dc108SYing Zhang . = .; 52bb0dc108SYing Zhang __start___ex_table = .; 53bb0dc108SYing Zhang __ex_table : { *(__ex_table) } 54bb0dc108SYing Zhang __stop___ex_table = .; 55bb0dc108SYing Zhang 56c97cd1baSScott Wood . = ALIGN(8); 57c97cd1baSScott Wood __init_begin = .; 58c97cd1baSScott Wood __init_end = .; 59651fcf60SPrabhakar Kushwaha#ifdef CONFIG_SPL_SKIP_RELOCATE 60651fcf60SPrabhakar Kushwaha . = ALIGN(4); 61651fcf60SPrabhakar Kushwaha __bss_start = .; 62651fcf60SPrabhakar Kushwaha .bss : { 63651fcf60SPrabhakar Kushwaha *(.sbss*) 64651fcf60SPrabhakar Kushwaha *(.bss*) 65651fcf60SPrabhakar Kushwaha } 66651fcf60SPrabhakar Kushwaha . = ALIGN(4); 67651fcf60SPrabhakar Kushwaha __bss_end = .; 68651fcf60SPrabhakar Kushwaha#endif 696609916eSPo Liu 706609916eSPo Liu/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */ 716609916eSPo Liu#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC 726609916eSPo Liu .bootpg ADDR(.text) - 0x1000 : 736609916eSPo Liu { 746609916eSPo Liu KEEP(*(.bootpg)) 756609916eSPo Liu } :text = 0xffff 766609916eSPo Liu#else 77c97cd1baSScott Wood#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ 7849efe85bSPrabhakar Kushwaha#ifndef BOOT_PAGE_OFFSET 7949efe85bSPrabhakar Kushwaha#define BOOT_PAGE_OFFSET 0x1000 8049efe85bSPrabhakar Kushwaha#endif 8149efe85bSPrabhakar Kushwaha .bootpg ADDR(.text) + BOOT_PAGE_OFFSET : 82c97cd1baSScott Wood { 833a88179dSPrabhakar Kushwaha arch/powerpc/cpu/mpc85xx/start.o (.bootpg) 84c97cd1baSScott Wood } 8549efe85bSPrabhakar Kushwaha#ifndef RESET_VECTOR_OFFSET 86c97cd1baSScott Wood#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ 8749efe85bSPrabhakar Kushwaha#endif 88c97cd1baSScott Wood#elif defined(CONFIG_FSL_ELBC) 89c97cd1baSScott Wood#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ 90c97cd1baSScott Wood#else 91c97cd1baSScott Wood#error unknown NAND controller 92c97cd1baSScott Wood#endif 93c97cd1baSScott Wood .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { 94c97cd1baSScott Wood KEEP(*(.resetvec)) 95c97cd1baSScott Wood } = 0xffff 965df572f0SYing Zhang#endif 97c97cd1baSScott Wood 98651fcf60SPrabhakar Kushwaha#ifndef CONFIG_SPL_SKIP_RELOCATE 99c97cd1baSScott Wood /* 100c97cd1baSScott Wood * Make sure that the bss segment isn't linked at 0x0, otherwise its 101c97cd1baSScott Wood * address won't be updated during relocation fixups. 102c97cd1baSScott Wood */ 103c97cd1baSScott Wood . |= 0x10; 104c97cd1baSScott Wood 10567ad0d52SYing Zhang . = ALIGN(4); 106c97cd1baSScott Wood __bss_start = .; 107c97cd1baSScott Wood .bss : { 108c97cd1baSScott Wood *(.sbss*) 109c97cd1baSScott Wood *(.bss*) 110c97cd1baSScott Wood } 11167ad0d52SYing Zhang . = ALIGN(4); 1123929fb0aSSimon Glass __bss_end = .; 113651fcf60SPrabhakar Kushwaha#endif 114c97cd1baSScott Wood} 115