Searched refs:dma_regs (Results 1 – 6 of 6) sorted by relevance
264 void *dma_regs; member846 priv->rx_chan.hdp = priv->dma_regs + CPDMA_RXHDP_VER2; in _cpsw_init()847 priv->rx_chan.cp = priv->dma_regs + CPDMA_RXCP_VER2; in _cpsw_init()848 priv->rx_chan.rxfree = priv->dma_regs + CPDMA_RXFREE; in _cpsw_init()851 priv->tx_chan.hdp = priv->dma_regs + CPDMA_TXHDP_VER2; in _cpsw_init()852 priv->tx_chan.cp = priv->dma_regs + CPDMA_TXCP_VER2; in _cpsw_init()855 priv->rx_chan.hdp = priv->dma_regs + CPDMA_RXHDP_VER1; in _cpsw_init()856 priv->rx_chan.cp = priv->dma_regs + CPDMA_RXCP_VER1; in _cpsw_init()857 priv->rx_chan.rxfree = priv->dma_regs + CPDMA_RXFREE; in _cpsw_init()860 priv->tx_chan.hdp = priv->dma_regs + CPDMA_TXHDP_VER1; in _cpsw_init()[all …]
1173 val = readl(&eqos->dma_regs->mode); in eqos_init()1175 writel(val, &eqos->dma_regs->mode); in eqos_init()1177 if (!(readl(&eqos->dma_regs->mode) & EQOS_DMA_MODE_SWR)) in eqos_init()1414 setbits_le32(&eqos->dma_regs->ch0_tx_control, in eqos_enable()1418 clrsetbits_le32(&eqos->dma_regs->ch0_rx_control, in eqos_enable()1424 setbits_le32(&eqos->dma_regs->ch0_control, in eqos_enable()1436 clrsetbits_le32(&eqos->dma_regs->ch0_tx_control, in eqos_enable()1441 clrsetbits_le32(&eqos->dma_regs->ch0_rx_control, in eqos_enable()1450 writel(val, &eqos->dma_regs->sysbus_mode); in eqos_enable()1467 writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress); in eqos_enable()[all …]
53 struct eqos_dma_regs *dma_regs; member
199 __raw_readl((ep)->dma_regs + USBA_DMA_##reg)201 __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg)254 void *dma_regs; member
1276 ep->dma_regs = udc->regs + USBA_DMA_BASE(i); in usba_udc_pdata()
53 struct dma_regs { struct