123ca6f74SDavid Wu /* SPDX-License-Identifier: GPL-2.0+ */ 223ca6f74SDavid Wu /* 323ca6f74SDavid Wu * Copyright 2020 423ca6f74SDavid Wu */ 523ca6f74SDavid Wu 623ca6f74SDavid Wu #ifndef _DWC_ETH_QOS_H 723ca6f74SDavid Wu #define _DWC_ETH_QOS_H 823ca6f74SDavid Wu 963a2faadSDavid Wu #include <asm/gpio.h> 1023ca6f74SDavid Wu #include <reset.h> 1123ca6f74SDavid Wu 1223ca6f74SDavid Wu #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_NOT_ENABLED 0 1323ca6f74SDavid Wu #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB 2 1423ca6f74SDavid Wu #define EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_AV 1 1523ca6f74SDavid Wu 1665dd574dSDavid Wu #define EQOS_MAC_MDIO_ADDRESS_CR_100_150 1 1723ca6f74SDavid Wu #define EQOS_MAC_MDIO_ADDRESS_CR_20_35 2 1823ca6f74SDavid Wu #define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5 1923ca6f74SDavid Wu 2023ca6f74SDavid Wu struct eqos_config { 2123ca6f74SDavid Wu bool reg_access_always_ok; 2223ca6f74SDavid Wu int mdio_wait; 2323ca6f74SDavid Wu int swr_wait; 2423ca6f74SDavid Wu int config_mac; 2523ca6f74SDavid Wu int config_mac_mdio; 2623ca6f74SDavid Wu struct eqos_ops *ops; 2723ca6f74SDavid Wu }; 2823ca6f74SDavid Wu 2923ca6f74SDavid Wu struct eqos_ops { 3023ca6f74SDavid Wu void (*eqos_inval_desc)(void *desc); 3123ca6f74SDavid Wu void (*eqos_flush_desc)(void *desc); 3223ca6f74SDavid Wu void (*eqos_inval_buffer)(void *buf, size_t size); 3323ca6f74SDavid Wu void (*eqos_flush_buffer)(void *buf, size_t size); 3423ca6f74SDavid Wu int (*eqos_probe_resources)(struct udevice *dev); 3523ca6f74SDavid Wu int (*eqos_remove_resources)(struct udevice *dev); 3623ca6f74SDavid Wu int (*eqos_stop_resets)(struct udevice *dev); 3723ca6f74SDavid Wu int (*eqos_start_resets)(struct udevice *dev); 3823ca6f74SDavid Wu void (*eqos_stop_clks)(struct udevice *dev); 3923ca6f74SDavid Wu int (*eqos_start_clks)(struct udevice *dev); 4023ca6f74SDavid Wu int (*eqos_calibrate_pads)(struct udevice *dev); 4123ca6f74SDavid Wu int (*eqos_disable_calibration)(struct udevice *dev); 4223ca6f74SDavid Wu int (*eqos_set_tx_clk_speed)(struct udevice *dev); 4323ca6f74SDavid Wu ulong (*eqos_get_tick_clk_rate)(struct udevice *dev); 4423ca6f74SDavid Wu phy_interface_t (*eqos_get_interface)(struct udevice *dev); 4523ca6f74SDavid Wu }; 4623ca6f74SDavid Wu 4723ca6f74SDavid Wu struct eqos_priv { 4823ca6f74SDavid Wu struct udevice *dev; 4923ca6f74SDavid Wu const struct eqos_config *config; 5023ca6f74SDavid Wu fdt_addr_t regs; 5123ca6f74SDavid Wu struct eqos_mac_regs *mac_regs; 5223ca6f74SDavid Wu struct eqos_mtl_regs *mtl_regs; 5323ca6f74SDavid Wu struct eqos_dma_regs *dma_regs; 5423ca6f74SDavid Wu struct eqos_tegra186_regs *tegra186_regs; 5523ca6f74SDavid Wu struct reset_ctl reset_ctl; 5623ca6f74SDavid Wu struct gpio_desc phy_reset_gpio; 5723ca6f74SDavid Wu u32 reset_delays[3]; 5823ca6f74SDavid Wu struct clk clk_master_bus; 5923ca6f74SDavid Wu struct clk clk_rx; 6023ca6f74SDavid Wu struct clk clk_ptp_ref; 6123ca6f74SDavid Wu struct clk clk_tx; 6223ca6f74SDavid Wu struct clk clk_ck; 6323ca6f74SDavid Wu struct clk clk_slave_bus; 6423ca6f74SDavid Wu struct mii_dev *mii; 6523ca6f74SDavid Wu struct phy_device *phy; 6623ca6f74SDavid Wu int phyaddr; 6723ca6f74SDavid Wu u32 max_speed; 6823ca6f74SDavid Wu void *descs; 6923ca6f74SDavid Wu struct eqos_desc *tx_descs; 7023ca6f74SDavid Wu struct eqos_desc *rx_descs; 7123ca6f74SDavid Wu int tx_desc_idx, rx_desc_idx; 7223ca6f74SDavid Wu void *tx_dma_buf; 7323ca6f74SDavid Wu void *rx_dma_buf; 7423ca6f74SDavid Wu void *rx_pkt; 7523ca6f74SDavid Wu bool started; 7623ca6f74SDavid Wu bool reg_access_ok; 77*c93fd900SDavid Wu bool mii_reseted; 7823ca6f74SDavid Wu }; 7923ca6f74SDavid Wu 8023ca6f74SDavid Wu int eqos_init(struct udevice *dev); 8123ca6f74SDavid Wu void eqos_enable(struct udevice *dev); 8223ca6f74SDavid Wu int eqos_probe(struct udevice *dev); 8323ca6f74SDavid Wu void eqos_stop(struct udevice *dev); 8423ca6f74SDavid Wu int eqos_send(struct udevice *dev, void *packet, int length); 8523ca6f74SDavid Wu int eqos_recv(struct udevice *dev, int flags, uchar **packetp); 8623ca6f74SDavid Wu int eqos_free_pkt(struct udevice *dev, uchar *packet, int length); 8723ca6f74SDavid Wu int eqos_write_hwaddr(struct udevice *dev); 8823ca6f74SDavid Wu 89fc99c7abSDavid Wu extern struct eqos_ops eqos_rockchip_ops; 90fc99c7abSDavid Wu 9123ca6f74SDavid Wu #endif 92