| #
c93fd900 |
| 28-Dec-2020 |
David Wu <david.wu@rock-chips.com> |
net: dwc_eth_qos: Don't reset phy every time
Change-Id: Id2e3322f6171dfb89452757a458b5a0821136da3 Signed-off-by: David Wu <david.wu@rock-chips.com>
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| #
63a2faad |
| 02-Jun-2020 |
David Wu <david.wu@rock-chips.com> |
net: dwc_eth_qos: Fix compile error for gpio
Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ife092cc2aca2c359fc465058e44ca645afbc8114
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| #
65dd574d |
| 09-May-2020 |
David Wu <david.wu@rock-chips.com> |
net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip
The Rockchip CSR clock range is from 100M to 150M, add EQOS_MAC_MDIO_ADDRESS_CR_100_150.
Signed-off-by: David Wu <david.wu@rock-c
net: dwc_eth_qos: Add EQOS_MAC_MDIO_ADDRESS_CR_100_150 for Rockchip
The Rockchip CSR clock range is from 100M to 150M, add EQOS_MAC_MDIO_ADDRESS_CR_100_150.
Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ib60f306cb9e8abec9557e92a6d04d76a7071b9ea
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| #
fc99c7ab |
| 09-May-2020 |
David Wu <david.wu@rock-chips.com> |
net: dwc_eth_qos: Add eqos_rockchip_ops
The eqos_rockchip_ops is simillar to eqos_stm32_ops, and export the eqos_rockchip_ops to use.
Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: I2
net: dwc_eth_qos: Add eqos_rockchip_ops
The eqos_rockchip_ops is simillar to eqos_stm32_ops, and export the eqos_rockchip_ops to use.
Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: I214b0b2fbe04a139de911435c4abf224264f5495
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| #
23ca6f74 |
| 30-Apr-2020 |
David Wu <david.wu@rock-chips.com> |
net: dwc_eth_qos: Export common struct and interface at head file
Open structure data and interface, so that Soc using dw_eth_qos controller can reference.
Signed-off-by: David Wu <david.wu@rock-ch
net: dwc_eth_qos: Export common struct and interface at head file
Open structure data and interface, so that Soc using dw_eth_qos controller can reference.
Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ic845d330465c1bb8f7868fb188e5bf30c865b9b5
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