Home
last modified time | relevance | path

Searched refs:cs1 (Results 1 – 25 of 32) sorted by relevance

12

/rk3399_rockchip-uboot/drivers/watchdog/
H A Dulp_wdog.c15 u8 cs1; member
77 writeb((WDGCS1_WDGE | WDGCS1_WDGUPDATE), &wdog->cs1);/* enable counter running */ in hw_watchdog_init()
93 writeb(WDGCS1_WDGE, &wdog->cs1);/* enable counter running */ in reset_cpu()
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a33.c24 u8 cs1; member
38 writel(MCTL_CR_CS1_CONTROL(para->cs1) | MCTL_CR_UNKNOWN | in mctl_set_cr()
232 para->cs1 = 0; in mctl_channel_init()
268 para->cs1 = 1; in mctl_channel_init()
276 para->cs1 = 0; in mctl_channel_init()
336 .cs1 = 0, in sunxi_dram_init()
H A Ddram_sun8i_a83t.c22 u8 cs1; member
37 writel(MCTL_CR_CS1_CONTROL(para->cs1) | MCTL_CR_UNKNOWN | in mctl_set_cr()
315 para->cs1 = 0; in mctl_channel_init()
360 para->cs1 = 1; in mctl_channel_init()
368 para->cs1 = 0; in mctl_channel_init()
434 .cs1 = 0, in sunxi_dram_init()
/rk3399_rockchip-uboot/board/imx31_phycore/
H A Dimx31_phycore.c49 static const struct mxc_weimcs cs1 = { in board_early_init_f() local
69 mxc_setup_weimcs(1, &cs1); in board_early_init_f()
/rk3399_rockchip-uboot/board/freescale/m5208evbe/
H A Dm5208evbe.c40 out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
/rk3399_rockchip-uboot/board/freescale/m53017evb/
H A Dm53017evb.c40 out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3588-vccio3-pinctrl.dtsi48 fspim1_cs1: fspim1-cs1 {
335 spi1m0_cs1: spi1m0-cs1 {
359 spi3m0_cs1: spi3m0-cs1 {
H A Drk3588s-pinctrl.dtsi371 fspim0_cs1: fspim0-cs1 {
393 fspim2_cs1: fspim2-cs1 {
2102 spi0m0_cs1: spi0m0-cs1 {
2123 spi0m1_cs1: spi0m1-cs1 {
2144 spi0m2_cs1: spi0m2-cs1 {
2165 spi0m3_cs1: spi0m3-cs1 {
2189 spi1m1_cs1: spi1m1-cs1 {
2211 spi1m2_cs1: spi1m2-cs1 {
2235 spi2m0_cs1: spi2m0-cs1 {
2257 spi2m1_cs1: spi2m1-cs1 {
[all …]
H A Drk3188.dtsi350 spi0_cs1: spi0-cs1 {
368 spi1_cs1: spi1-cs1 {
H A Drv1103b-pinctrl.dtsi632 spi0m0_cs1_pins: spi0m0-cs1-pins {
654 spi0m1_cs1_pins: spi0m1-cs1-pins {
H A Drk3066a.dtsi416 spi0_cs1: spi0-cs1 {
434 spi1_cs1: spi1-cs1 {
H A Drv1106-pinctrl.dtsi766 spi0m0_cs1: spi0m0-cs1 {
790 spi1m0_cs1: spi1m0-cs1 {
H A Darmada-370-xp.dtsi109 devbus-cs1 {
H A Drk3128.dtsi1058 spi0_cs1: spi0-cs1 {
1078 spi1_cs1: spi1-cs1 {
H A Darmada-388-clearfog.dts503 MPP55: spi1:cs1 x slic
H A Drk3368.dtsi1054 spi0_cs1: spi0-cs1 {
1072 spi1_cs1: spi1-cs1 {
/rk3399_rockchip-uboot/drivers/ram/rockchip/sdram_inc/rv1126/
H A Dsdram-rv1126-loader_params.inc148 /* cs1 dq0-15 */
153 /* cs1 dq16-31 */
/rk3399_rockchip-uboot/board/astro/mcf5373l/
H A Dmcf5373l.c45 &sdp->cs1); in dram_init()
/rk3399_rockchip-uboot/arch/m68k/include/asm/
H A Dimmap_520x.h173 u32 cs1; /* 0x114 Chip Select 1 Cfg */ member
H A Dimmap_5301x.h293 u32 cs1; /* 0x114 Chip Select 1 Cfg */ member
H A Dimmap_5329.h371 u32 cs1; /* 0x114 Chip Select 1 Configuration */ member
/rk3399_rockchip-uboot/doc/
H A DREADME.fsl-ddr94 # bank(chip-select) interleaving cs0+cs1
100 # bank(chip-select) interleaving (cs0+cs1) and (cs2+cs3) (2x2)
103 # bank(chip-select) interleaving (cs0+cs1+cs2+cs3) (4x1)
H A DREADME.at9128 make at91sam9260ek_dataflash_cs1_config - use data flash (spi cs1)
/rk3399_rockchip-uboot/doc/device-tree-bindings/spi/
H A Dspi-bus.txt40 cs1 : native
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dddr.c908 #define MR(val, ba, cmd, cs1) \ argument
909 ((val << 16) | (1 << 15) | (cmd << 4) | (cs1 << 3) | ba)

12