| /rk3399_rockchip-uboot/drivers/timer/ |
| H A D | atmel_pit_timer.c | 45 ulong clk_rate; in atmel_pit_probe() local
52 clk_rate = clk_get_rate(&clk); in atmel_pit_probe()
53 if (!clk_rate) in atmel_pit_probe()
56 uc_priv->clock_rate = clk_rate / 16; in atmel_pit_probe()
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| /rk3399_rockchip-uboot/drivers/adc/ |
| H A D | rockchip-saradc.c | 33 unsigned long clk_rate; member
110 ret = clk_set_rate(&clk, priv->data->clk_rate); in rockchip_saradc_probe()
150 .clk_rate = 1000000,
156 .clk_rate = 50000,
162 .clk_rate = 1000000,
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| H A D | rockchip-saradc-v2.c | 95 unsigned long clk_rate; member
193 ret = clk_set_rate(&clk, priv->data->clk_rate); in rockchip_saradc_probe()
236 .clk_rate = 1000000,
242 .clk_rate = 1000000,
248 .clk_rate = 1000000,
254 .clk_rate = 1000000,
260 .clk_rate = 24000000,
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| /rk3399_rockchip-uboot/drivers/clk/at91/ |
| H A D | clk-peripheral.c | 85 ulong clk_rate; in periph_get_rate() local
94 clk_rate = clk_get_rate(&clk_dev); in periph_get_rate()
98 return clk_rate; in periph_get_rate()
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| H A D | clk-generated.c | 54 ulong clk_rate; in generic_clk_get_rate() local
69 clk_rate = clk_get_rate(&parent) / (gckdiv + 1); in generic_clk_get_rate()
73 return clk_rate; in generic_clk_get_rate()
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| /rk3399_rockchip-uboot/drivers/video/ |
| H A D | atmel_hlcdfb.c | 259 ulong clk_rate; member
266 ulong clk_rate; in at91_hlcdc_enable_clk() local
277 clk_rate = clk_get_rate(&clk); in at91_hlcdc_enable_clk()
278 if (!clk_rate) { in at91_hlcdc_enable_clk()
283 priv->clk_rate = clk_rate; in at91_hlcdc_enable_clk()
326 value = priv->clk_rate / timing->pixelclock.typ; in atmel_hlcdc_init()
327 if (priv->clk_rate % timing->pixelclock.typ) in atmel_hlcdc_init()
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| /rk3399_rockchip-uboot/drivers/serial/ |
| H A D | atmel_usart.c | 226 ulong clk_rate; in atmel_serial_enable_clk() local
239 clk_rate = clk_get_rate(&clk); in atmel_serial_enable_clk()
240 if (!clk_rate) in atmel_serial_enable_clk()
243 priv->usart_clk_rate = clk_rate; in atmel_serial_enable_clk()
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| H A D | serial_msm.c | 149 uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), in msm_uart_clk_init() local
175 ret = clk_set_rate(&clk, clk_rate); in msm_uart_clk_init()
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| /rk3399_rockchip-uboot/drivers/i2c/ |
| H A D | at91_i2c.c | 180 ulong clk_rate; in at91_i2c_enable_clk() local
191 clk_rate = clk_get_rate(&clk); in at91_i2c_enable_clk()
192 if (!clk_rate) in at91_i2c_enable_clk()
195 bus->bus_clk_rate = clk_rate; in at91_i2c_enable_clk()
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| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | denali_dt.c | 122 denali->clk_rate = clk_get_rate(&clk); in denali_dt_probe()
131 denali->clk_rate = 50000000; in denali_dt_probe()
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| H A D | sunxi_nand.c | 239 unsigned long clk_rate; member
278 unsigned long clk_rate; member
450 if (nfc->clk_rate != sunxi_nand->clk_rate) { in sunxi_nfc_select_chip()
451 sunxi_nfc_set_clk_rate(sunxi_nand->clk_rate); in sunxi_nfc_select_chip()
452 nfc->clk_rate = sunxi_nand->clk_rate; in sunxi_nfc_select_chip()
1342 chip->clk_rate = 1000000000L / min_clk_period; in sunxi_nand_chip_set_timings()
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| H A D | tegra_nand.c | 857 u32 reg_val, clk_rate, clk_period, time_val; in setup_timing() local
859 clk_rate = (u32)clock_get_periph_rate(PERIPH_ID_NDFLASH, in setup_timing()
861 clk_period = 1000 / clk_rate; in setup_timing()
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| H A D | denali.h | 297 unsigned long clk_rate; /* core clock rate */ member
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| H A D | denali.c | 968 mult_x = DIV_ROUND_CLOSEST_ULL(denali->clk_x_rate, denali->clk_rate); in denali_setup_data_interface()
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | atcspi200_spi.c | 344 ulong clk_rate; in atcspi200_spi_get_clk() local
351 clk_rate = clk_get_rate(&clk); in atcspi200_spi_get_clk()
352 if (!clk_rate) in atcspi200_spi_get_clk()
355 ns->clock = clk_rate; in atcspi200_spi_get_clk()
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| H A D | atmel_spi.c | 446 ulong clk_rate; in atmel_spi_enable_clk() local
457 clk_rate = clk_get_rate(&clk); in atmel_spi_enable_clk()
458 if (!clk_rate) in atmel_spi_enable_clk()
461 priv->bus_clk_rate = clk_rate; in atmel_spi_enable_clk()
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| H A D | bcm63xx_hsspi.c | 101 ulong clk_rate; member
148 set = DIV_ROUND_UP(priv->clk_rate, priv->speed); in bcm63xx_hsspi_activate_cs()
371 priv->clk_rate = clk_get_rate(&clk); in bcm63xx_hsspi_probe()
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| H A D | pic32_spi.c | 67 ulong clk_rate; member
299 div = (priv->clk_rate / 2 / speed) - 1; in pic32_spi_set_speed()
403 priv->clk_rate = clk_get_periph_rate(clkdev, ret); in pic32_spi_probe()
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| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | msm_sdhci.c | 54 uint clk_rate = fdtdec_get_uint(gd->fdt_blob, node, "clock-frequency", in msm_sdc_clk_init() local
79 ret = clk_set_rate(&clk, clk_rate); in msm_sdc_clk_init()
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| H A D | gen_atmel_mci.c | 560 ulong clk_rate; local
573 clk_rate = clk_get_rate(&clk);
574 if (!clk_rate) {
579 priv->bus_clk_rate = clk_rate;
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| H A D | mxcmmc.c | 35 u32 clk_rate; member
448 writel((prescaler << 4) | divider, &host->base->clk_rate); in mxcmci_set_clk_rate()
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| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | zynq_gem.c | 354 unsigned long clk_rate = 0; in zynq_gem_init() local
441 clk_rate = ZYNQ_GEM_FREQUENCY_1000; in zynq_gem_init()
446 clk_rate = ZYNQ_GEM_FREQUENCY_100; in zynq_gem_init()
449 clk_rate = ZYNQ_GEM_FREQUENCY_10; in zynq_gem_init()
453 ret = clk_set_rate(&priv->clk, clk_rate); in zynq_gem_init()
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| H A D | macb.c | 1009 ulong clk_rate; in macb_enable_clk() local
1020 clk_rate = clk_get_rate(&clk); in macb_enable_clk()
1021 if (!clk_rate) in macb_enable_clk()
1024 macb->pclk_rate = clk_rate; in macb_enable_clk()
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm235xx/ |
| H A D | clk-bcm235xx.c | 24 #define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \ argument
29 .rate = clk_rate, \
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | clk-bcm281xx.c | 24 #define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \ argument
29 .rate = clk_rate, \
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