| #
f6b2aa45 |
| 01-Mar-2019 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
UPSTREAM: mtd: rawnand: denali: add reset handling
This adds reset handling to the devicetree-enabled Denali NAND driver.
For backwards compatibility, only a warning is printed when failing to get
UPSTREAM: mtd: rawnand: denali: add reset handling
This adds reset handling to the devicetree-enabled Denali NAND driver.
For backwards compatibility, only a warning is printed when failing to get reset handles.
Change-Id: I0d0ccb6e20f7c3ca6056c8aa03fb8ccd7b7bf340 Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit ed784ac3822b7d7019679a41a17907296e2dadbe)
show more ...
|
| #
3d00936c |
| 19-Dec-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: mtd: rawnand: denali: optimize timing parameters for data interface
Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191
This commit improves the ->setup_data_interface() hook.
UPSTREAM: mtd: rawnand: denali: optimize timing parameters for data interface
Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191
This commit improves the ->setup_data_interface() hook.
The denali_setup_data_interface() needs the frequency of clk_x and the ratio of clk_x / clk.
The latter is currently hardcoded in the driver, like this:
#define DENALI_CLK_X_MULT 6
The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just chose 6 because it is the most defensive value, but it is not optimal. By getting the clock rate of both "clk" and "clk_x", the driver can compute the timing values more precisely.
To not break the existing platforms, the fallback value, 50 MHz is provided. It is true for all upstreamed platforms.
Change-Id: Ia8b76dbbbac6ae1d82936a633c457280e3adc315 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 8ccfbfb3e1c54caf67def3626ca046fafaa5092d)
show more ...
|
| #
577a294e |
| 19-Dec-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: mtd: rawnand: denali_dt: add more clocks based on IP datasheet
Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5
Currently, denali_dt.c requires a single anonymous clock, but
UPSTREAM: mtd: rawnand: denali_dt: add more clocks based on IP datasheet
Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5
Currently, denali_dt.c requires a single anonymous clock, but the Denali User's Guide requires three clocks for this IP:
- clk: controller core clock
- clk_x: bus interface clock
- ecc_clk: clock at which ECC circuitry is run
This commit supports these named clocks to represent the real hardware.
For the backward compatibility, the driver still accepts a single clock just as before. The clk_x_rate is taken from the clock driver again if the named clock "clk_x" is available. This will happen only for future DT, hence the existing DT files are not affected.
Change-Id: Ib1b3913554f5a3cad89f6ca919a3ca8e020bb1ad Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit a13fe7afe9cd79060ecb8ac03265a27ceb7d91eb)
show more ...
|
| #
cfcc706c |
| 16-Aug-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
UPSTREAM: mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in
UPSTREAM: mtd: move NAND files into a raw/ subdirectory
NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Change-Id: Ibb56f85620c4798fb579be3e4e30438963b7c48b Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit a430fa06a4ac50e785fdbfb7f43c3cb14b35619c)
show more ...
|