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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-sa1100/
H A Dbitfield.h18 #define UData(Data) ((unsigned long) (Data)) argument
20 #define UData(Data) (Data) argument
108 #define FExtr(Data, Field) \ argument
109 ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-pxa/
H A Dbitfield.h18 #define UData(Data) ((unsigned long) (Data)) argument
20 #define UData(Data) (Data) argument
108 #define FExtr(Data, Field) \ argument
109 ((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
/rk3399_rockchip-uboot/board/freescale/mpc8536ds/
H A DREADME78 Offset | Data | Description
90 | 0x68-0x6B | 0x6 | Number of Config Addr/Data |
93 | 0x84-0x87 | 0xF8F80000 | Config Data 1 |
96 | 0x8c-0x8f | 0x0000000C | Config Data 2 |
99 | 0x94-0x97 | 0x80010000 | Config Data 3 |
102 | 0x9c-0x9f | 0x00000040 | Config Data 4 |
105 | 0xa4-0xa7 | 0x00000100 | Config Data 5 |
108 | 0xac-0xaf | 0x80000001 | Config Data 6 |
/rk3399_rockchip-uboot/doc/uImage.FIT/
H A Dhowto.txt93 Data Size: 943347 Bytes = 921.24 kB = 0.90 MB
137 Data Start: 0x009000e0
138 Data Size: 943347 Bytes = 921.2 kB
159 Data Start: 0x009000e0
160 Data Size: 943347 Bytes = 921.2 kB
203 Data Size: 1092037 Bytes = 1066.44 kB = 1.04 MB
216 Data Size: 16384 Bytes = 16.00 kB = 0.02 MB
252 Data Start: 0x009000ec
253 Data Size: 1092037 Bytes = 1 MB
266 Data Start: 0x00a0abdc
[all …]
H A Dbeaglebone_vboot.txt80 …14, Load Address: 0x80800000, Entry Point: 0x00000000, Header CRC: 0x0ABD6ACA, Data CRC: 0x36DEF7E4
219 Data Size: 7790938 Bytes = 7608.34 kB = 7.43 MB
231 Data Size: 31547 Bytes = 30.81 kB = 0.03 MB
264 Data Size: 7790938 Bytes = 7608.34 kB = 7.43 MB
283 Data Size: 31547 Bytes = 30.81 kB = 0.03 MB
337 Data Size: 7790938 Bytes = 7608.34 kB = 7.43 MB
347 Bad Data Hash
356 Data Size: 31547 Bytes = 30.81 kB = 0.03 MB
531 Data Start: 0x820000a8
532 Data Size: 7790938 Bytes = 7.4 MiB
[all …]
/rk3399_rockchip-uboot/doc/
H A DREADME.mpc83xx.ddrecc37 1. Set 1 bit in Data Path Error Inject Mask
49 Memory Data Path Error Injection Mask High/Low: 00000001 00000000
81 1. Set more than 1 bit in Data Path Error Inject Mask
94 Memory Data Path Error Injection Mask High/Low: 00000001 00000001
122 1. Set 1 bit in Data Path Error Inject Mask
H A DREADME.m68k121 CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers
122 CONFIG_SYS_PxDAT -- defines the contents of the Data Registers
156 CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers
157 CONFIG_SYS_PxDAT -- defines the contents of the Data Registers
/rk3399_rockchip-uboot/board/aristainetos/
H A Dddr-setup2.cfg6 * Device Configuration Data (DCD)
33 /* Data Strobe */
H A Dddr-setup.cfg6 * Device Configuration Data (DCD)
35 /* Data Strobe */
H A Daxi.cfg6 * Device Configuration Data (DCD)
H A Dclocks2.cfg6 * Device Configuration Data (DCD)
H A Dclocks.cfg6 * Device Configuration Data (DCD)
/rk3399_rockchip-uboot/board/freescale/mx6sxsabresd/
H A Dimximage.cfg22 * Device Configuration Data (DCD)
63 /* Data Strobe */
70 /* Data */
/rk3399_rockchip-uboot/board/freescale/mx6sxsabreauto/
H A Dimximage.cfg22 * Device Configuration Data (DCD)
63 /* Data Strobe */
70 /* Data */
/rk3399_rockchip-uboot/board/samtec/vining_2000/
H A Dimximage.cfg22 * Device Configuration Data (DCD)
63 /* Data Strobe */
70 /* Data */
/rk3399_rockchip-uboot/board/keymile/km_arm/
H A Dkwbimage_128M16_1.cfg70 # bit 17-16: 2, Data RAM RTC RAM0
71 # bit 19-18: 1, Data RAM WTC RAM0
72 # bit 21-20: 2, Data RAM RTC RAM1
73 # bit 23-22: 1, Data RAM WTC RAM1
74 # bit 25-24: 2, Data RAM RTC RAM2
75 # bit 27-26: 1, Data RAM WTC RAM2
76 # bit 29-28: 2, Data RAM RTC RAM3
77 # bit 31-30: 1, Data RAM WTC RAM4
H A Dkwbimage_256M8_1.cfg72 # bit 17-16: 2, Data RAM RTC RAM0
73 # bit 19-18: 1, Data RAM WTC RAM0
74 # bit 21-20: 2, Data RAM RTC RAM1
75 # bit 23-22: 1, Data RAM WTC RAM1
76 # bit 25-24: 2, Data RAM RTC RAM2
77 # bit 27-26: 1, Data RAM WTC RAM2
78 # bit 29-28: 2, Data RAM RTC RAM3
79 # bit 31-30: 1, Data RAM WTC RAM4
/rk3399_rockchip-uboot/doc/device-tree-bindings/serial/
H A Dmsm-serial.txt1 Qualcomm UART (Data Mover mode)
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dat91sam9x5.dtsi579 AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
580 AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
581 AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
582 AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
583 AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
584 AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
585 AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
586 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
591 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
592 AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
[all …]
/rk3399_rockchip-uboot/board/toradex/apalis_imx6/
H A Dclocks.cfg7 * Device Configuration Data (DCD)
/rk3399_rockchip-uboot/board/toradex/colibri_imx6/
H A Dclocks.cfg7 * Device Configuration Data (DCD)
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A Dclocks.cfg6 * Device Configuration Data (DCD)
/rk3399_rockchip-uboot/doc/device-tree-bindings/net/
H A Dmicrel-ksz90x1.txt152 Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
155 Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
160 Note that a previous version of the Micrel ksz9021rl/rn Data Sheet
/rk3399_rockchip-uboot/board/freescale/mx25pdk/
H A Dimximage.cfg20 * Device Configuration Data (DCD)
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/doc/
H A DREADME.soc22 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
62 - Data path acceleration architecture (DPAA2) incorporating acceleration for
146 - Data Path Acceleration Architecture (DPAA) incorporating acceleration the
189 - Data path acceleration architecture (DPAA2) incorporating acceleration for

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