1*7254d92eSHeiko Schocher/* 2*7254d92eSHeiko Schocher * Copyright (C) 2013 Boundary Devices 3*7254d92eSHeiko Schocher * 4*7254d92eSHeiko Schocher * SPDX-License-Identifier: GPL-2.0+ 5*7254d92eSHeiko Schocher * 6*7254d92eSHeiko Schocher * Device Configuration Data (DCD) 7*7254d92eSHeiko Schocher * 8*7254d92eSHeiko Schocher * Each entry must have the format: 9*7254d92eSHeiko Schocher * Addr-type Address Value 10*7254d92eSHeiko Schocher * 11*7254d92eSHeiko Schocher * where: 12*7254d92eSHeiko Schocher * Addr-type register length (1,2 or 4 bytes) 13*7254d92eSHeiko Schocher * Address absolute address of the register 14*7254d92eSHeiko Schocher * value value to be stored in the register 15*7254d92eSHeiko Schocher */ 16*7254d92eSHeiko Schocher 17*7254d92eSHeiko Schocher/* set the default clock gate to save power */ 18*7254d92eSHeiko SchocherDATA 4, CCM_CCGR0, 0x00c03f3f 19*7254d92eSHeiko SchocherDATA 4, CCM_CCGR1, 0x0030fcff 20*7254d92eSHeiko SchocherDATA 4, CCM_CCGR2, 0x0fffcfc0 21*7254d92eSHeiko SchocherDATA 4, CCM_CCGR3, 0x3ff0300f 22*7254d92eSHeiko SchocherDATA 4, CCM_CCGR4, 0xfffff300 23*7254d92eSHeiko SchocherDATA 4, CCM_CCGR5, 0x0f0000c3 24*7254d92eSHeiko SchocherDATA 4, CCM_CCGR6, 0x00000fff 25