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Searched refs:pwr_lvl (Results 1 – 25 of 26) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/mt8173/include/
H A Dmt8173_def.h118 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
121 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
123 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
129 #define mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
131 mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
135 lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
137 mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/
H A Dsbsa_pm.c36 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
40 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
42 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
47 #define qemu_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
49 qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
/rk3399_ARM-atf/plat/qemu/common/
H A Dqemu_pm.c29 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
33 #define qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
35 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
40 #define qemu_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
42 qemu_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
/rk3399_ARM-atf/plat/arm/common/
H A Darm_pm.c28 unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in arm_validate_power_state() local
33 if (pwr_lvl > PLAT_MAX_PWR_LVL) in arm_validate_power_state()
42 if (pwr_lvl != ARM_PWR_LVL0) in arm_validate_power_state()
48 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++) in arm_validate_power_state()
/rk3399_ARM-atf/plat/rpi/common/
H A Drpi3_pm.c43 #define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
49 #define rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
51 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
56 #define rpi3_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
58 rpi3_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
/rk3399_ARM-atf/plat/mediatek/mt8183/
H A Dplat_pm.c53 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
58 #define mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
60 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
66 #define mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
68 mtk_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
72 lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
74 mtk_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
485 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in plat_mtk_validate_power_state() local
490 if (pwr_lvl > PLAT_MAX_PWR_LVL) in plat_mtk_validate_power_state()
499 if (pwr_lvl != 0) in plat_mtk_validate_power_state()
[all …]
/rk3399_ARM-atf/include/plat/arm/common/
H A Dplat_arm.h165 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
168 #define arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
170 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
175 #define arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
177 arm_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
180 #define arm_make_pwrstate_lvl2(lvl2_state, lvl1_state, lvl0_state, pwr_lvl, type) \ argument
182 arm_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type))
/rk3399_ARM-atf/plat/nuvoton/npcm845x/
H A Dnpcm845x_psci.c29 #define npcm845x_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
33 #define npcm845x_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type) \ argument
35 ((pwr_lvl) << PSTATE_PWR_LVL_SHIFT) | \
39 #define npcm845x_make_pwrstate_lvl1(lvl1_state, lvl0_state, pwr_lvl, type) \ argument
41 npcm845x_make_pwrstate_lvl0(lvl0_state, pwr_lvl, type))
/rk3399_ARM-atf/plat/imx/common/
H A Dimx8_psci.c35 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in imx_validate_power_state() local
39 if (pwr_lvl > PLAT_MAX_PWR_LVL) in imx_validate_power_state()
/rk3399_ARM-atf/plat/rockchip/common/
H A Dplat_pm.c134 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in rockchip_validate_power_state() local
139 if (pwr_lvl > PLAT_MAX_PWR_LVL) in rockchip_validate_power_state()
148 if (pwr_lvl != MPIDR_AFFLVL0) in rockchip_validate_power_state()
154 for (i = MPIDR_AFFLVL0; i <= pwr_lvl; i++) in rockchip_validate_power_state()
158 for (i = (pwr_lvl + 1); i <= PLAT_MAX_PWR_LVL; i++) in rockchip_validate_power_state()
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_pm.c218 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in hikey_validate_power_state() local
223 if (pwr_lvl > PLAT_MAX_PWR_LVL) in hikey_validate_power_state()
232 if (pwr_lvl != MPIDR_AFFLVL0) in hikey_validate_power_state()
238 for (i = MPIDR_AFFLVL0; i <= pwr_lvl; i++) in hikey_validate_power_state()
/rk3399_ARM-atf/plat/brcm/board/stingray/src/
H A Dbrcm_pm_ops.c348 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in brcm_validate_power_state() local
353 if (pwr_lvl > PLAT_MAX_PWR_LVL) in brcm_validate_power_state()
362 if (pwr_lvl != MPIDR_AFFLVL0) in brcm_validate_power_state()
368 for (i = MPIDR_AFFLVL0; i <= pwr_lvl; i++) in brcm_validate_power_state()
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_pm.c142 unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in hikey960_validate_power_state() local
147 if (pwr_lvl > PLAT_MAX_PWR_LVL) in hikey960_validate_power_state()
156 if (pwr_lvl != MPIDR_AFFLVL0) in hikey960_validate_power_state()
162 for (i = MPIDR_AFFLVL0; i <= pwr_lvl; i++) in hikey960_validate_power_state()
/rk3399_ARM-atf/plat/renesas/rcar_gen5/
H A Dplat_pm.c165 uint32_t pwr_lvl = psci_get_pstate_pwrlvl(power_state); in rcar_validate_power_state() local
170 if (pwr_lvl != MPIDR_AFFLVL0) { in rcar_validate_power_state()
176 for (i = MPIDR_AFFLVL0; i <= (uint64_t)pwr_lvl; i++) { in rcar_validate_power_state()
/rk3399_ARM-atf/plat/renesas/rcar_gen4/
H A Dplat_pm.c161 uint32_t pwr_lvl = psci_get_pstate_pwrlvl(power_state); in rcar_validate_power_state() local
166 if (pwr_lvl != MPIDR_AFFLVL0) in rcar_validate_power_state()
171 for (i = MPIDR_AFFLVL0; i <= (uint64_t)pwr_lvl; i++) in rcar_validate_power_state()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mq/
H A Dimx8mq_psci.c24 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in imx_validate_power_state() local
28 if (pwr_lvl > PLAT_MAX_PWR_LVL) in imx_validate_power_state()
/rk3399_ARM-atf/plat/ti/k3/common/
H A Dk3_psci.c231 unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in k3_validate_power_state() local
234 if (pwr_lvl > PLAT_MAX_PWR_LVL) in k3_validate_power_state()
242 if (pwr_lvl != MPIDR_AFFLVL0) in k3_validate_power_state()
/rk3399_ARM-atf/plat/mediatek/mt8173/
H A Dplat_pm.c473 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in plat_validate_power_state() local
478 if (pwr_lvl > PLAT_MAX_PWR_LVL) in plat_validate_power_state()
487 if (pwr_lvl != 0) in plat_validate_power_state()
493 for (i = 0; i <= pwr_lvl; i++) in plat_validate_power_state()
/rk3399_ARM-atf/plat/renesas/common/
H A Dplat_pm.c257 unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in rcar_validate_power_state() local
262 if (pwr_lvl != MPIDR_AFFLVL0) in rcar_validate_power_state()
267 for (i = MPIDR_AFFLVL0; i <= pwr_lvl; i++) in rcar_validate_power_state()
/rk3399_ARM-atf/plat/imx/imx8m/
H A Dimx8m_psci_common.c72 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in imx_validate_power_state() local
76 if (pwr_lvl > PLAT_MAX_PWR_LVL) in imx_validate_power_state()
/rk3399_ARM-atf/lib/psci/
H A Dpsci_stat.c47 static unsigned int get_stat_idx(plat_local_state_t local_state, unsigned int pwr_lvl) in get_stat_idx() argument
60 idx = psci_plat_pm_ops->get_pwr_lvl_state_idx(local_state, pwr_lvl); in get_stat_idx()
/rk3399_ARM-atf/plat/imx/imx93/
H A Dimx93_psci.c41 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in imx_validate_power_state() local
45 if (pwr_lvl > PLAT_MAX_PWR_LVL) { in imx_validate_power_state()
/rk3399_ARM-atf/plat/marvell/armada/a8k/common/
H A Dplat_pm.c347 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in a8k_validate_power_state() local
350 if (pwr_lvl > PLAT_MAX_PWR_LVL) in a8k_validate_power_state()
359 if (pwr_lvl != MARVELL_PWR_LVL0) in a8k_validate_power_state()
365 for (i = MARVELL_PWR_LVL0; i <= pwr_lvl; i++) in a8k_validate_power_state()
/rk3399_ARM-atf/plat/imx/imx9/common/
H A Dimx9_psci_common.c48 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in imx_validate_power_state() local
52 if (pwr_lvl > PLAT_MAX_PWR_LVL) { in imx_validate_power_state()
/rk3399_ARM-atf/plat/imx/imx8ulp/
H A Dimx8ulp_psci.c456 int pwr_lvl = psci_get_pstate_pwrlvl(power_state); in imx_validate_power_state() local
459 if (pwr_lvl > PLAT_MAX_PWR_LVL) { in imx_validate_power_state()

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