| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/ |
| H A D | dram_spec_timing.c | 252 pdram_timing->mr[1] = tmp | DDR3_RTT_NOM_60; in ddr3_get_parameter()
255 pdram_timing->mr[1] = tmp | DDR3_RTT_NOM_40; in ddr3_get_parameter()
258 pdram_timing->mr[1] = tmp | DDR3_RTT_NOM_120; in ddr3_get_parameter()
262 pdram_timing->mr[1] = tmp | DDR3_RTT_NOM_DIS; in ddr3_get_parameter()
266 pdram_timing->mr[1] = tmp | DDR3_RTT_NOM_DIS; in ddr3_get_parameter()
268 pdram_timing->mr[2] = DDR3_MR2_CWL(pdram_timing->cwl); in ddr3_get_parameter()
269 pdram_timing->mr[3] = 0; in ddr3_get_parameter()
289 pdram_timing->mr[0] = DDR3_BC4 in ddr3_get_parameter()
293 pdram_timing->mr[0] = DDR3_BL8 in ddr3_get_parameter()
439 pdram_timing->mr[2] = LPDDR2_RL4_WL2; in lpddr2_get_parameter()
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| H A D | dfs.c | 598 mmio_write_32(CTL_REG(i, 133), (pdram_timing->mr[1] << 16) | in gen_rk3399_ctl_params_f0()
599 pdram_timing->mr[0]); in gen_rk3399_ctl_params_f0()
601 pdram_timing->mr[2]); in gen_rk3399_ctl_params_f0()
603 pdram_timing->mr[3]); in gen_rk3399_ctl_params_f0()
607 (pdram_timing->mr[1] << 16) | in gen_rk3399_ctl_params_f0()
608 pdram_timing->mr[0]); in gen_rk3399_ctl_params_f0()
610 pdram_timing->mr[2]); in gen_rk3399_ctl_params_f0()
612 pdram_timing->mr[3]); in gen_rk3399_ctl_params_f0()
849 pdram_timing->mr[0] << 16); in gen_rk3399_ctl_params_f1()
850 mmio_write_32(CTL_REG(i, 135), (pdram_timing->mr[2] << 16) | in gen_rk3399_ctl_params_f1()
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| H A D | dram_spec_timing.h | 132 uint32_t mr[4]; member
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| /rk3399_ARM-atf/plat/imx/imx8qx/ |
| H A D | imx8qx_bl31_setup.c | 199 sc_rm_mr_t mr, mr_record = 64; in imx8_partition_resources() local
246 for (mr = 0; mr < 64; mr++) { in imx8_partition_resources()
247 owned = sc_rm_is_memreg_owned(ipc_handle, mr); in imx8_partition_resources()
249 err = sc_rm_get_memreg_info(ipc_handle, mr, &start, &end); in imx8_partition_resources()
251 ERROR("Memreg get info failed, %u\n", mr); in imx8_partition_resources()
253 NOTICE("Memreg %u 0x%" PRIx64 " -- 0x%" PRIx64 "\n", mr, start, end); in imx8_partition_resources()
255 mr_record = mr; /* Record the mr for ATF running */ in imx8_partition_resources()
257 err = sc_rm_assign_memreg(ipc_handle, os_part, mr); in imx8_partition_resources()
270 err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end); in imx8_partition_resources()
274 err = sc_rm_assign_memreg(ipc_handle, os_part, mr); in imx8_partition_resources()
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| /rk3399_ARM-atf/plat/imx/common/include/sci/svc/rm/ |
| H A D | sci_rm_api.h | 534 sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr,
561 sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr,
578 sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr);
603 sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr,
622 sc_err_t sc_rm_assign_memreg(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_mr_t mr);
646 sc_err_t sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr,
660 sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
675 sc_err_t sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr,
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| /rk3399_ARM-atf/plat/imx/imx8qm/ |
| H A D | imx8qm_bl31_setup.c | 178 sc_rm_mr_t mr, mr_record = 64; in mx8_partition_resources() local
260 for (mr = 0; mr < 64; mr++) { in mx8_partition_resources()
261 owned = sc_rm_is_memreg_owned(ipc_handle, mr); in mx8_partition_resources()
263 err = sc_rm_get_memreg_info(ipc_handle, mr, &start, &end); in mx8_partition_resources()
265 ERROR("Memreg get info failed, %u\n", mr); in mx8_partition_resources()
266 NOTICE("Memreg %u 0x%" PRIx64 " -- 0x%" PRIx64 "\n", mr, start, end); in mx8_partition_resources()
268 mr_record = mr; /* Record the mr for ATF running */ in mx8_partition_resources()
270 err = sc_rm_assign_memreg(ipc_handle, os_part, mr); in mx8_partition_resources()
283 err = sc_rm_memreg_alloc(ipc_handle, &mr, BL31_LIMIT, end); in mx8_partition_resources()
287 err = sc_rm_assign_memreg(ipc_handle, os_part, mr); in mx8_partition_resources()
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| /rk3399_ARM-atf/plat/imx/imx8m/ddr/ |
| H A D | ddr4_dvfs.c | 12 void ddr4_mr_write(uint32_t mr, uint32_t data, uint32_t mr_type, in ddr4_mr_write() argument
45 mr_mirror = (mr & 0x4) | ((mr & 0x1) << 1) | ((mr & 0x2) >> 1); /* BA0, BA1 swap */ in ddr4_mr_write()
56 mr_mirror = mr; in ddr4_mr_write()
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| H A D | lpddr4_dvfs.c | 35 uint32_t mr, emr, emr2, emr3; in lpddr4_swffc() local
46 mr = mr_data[fsp_index][0]; in lpddr4_swffc()
67 lpddr4_mr_write(3, 1, mr); in lpddr4_swffc()
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| /rk3399_ARM-atf/plat/imx/common/sci/svc/rm/ |
| H A D | rm_rpc_clnt.c | 393 sc_err_t sc_rm_memreg_alloc(sc_ipc_t ipc, sc_rm_mr_t *mr, in sc_rm_memreg_alloc() argument
411 if (mr != NULL) { in sc_rm_memreg_alloc()
412 *mr = RPC_U8(&msg, 0U); in sc_rm_memreg_alloc()
418 sc_err_t sc_rm_memreg_split(sc_ipc_t ipc, sc_rm_mr_t mr, in sc_rm_memreg_split() argument
432 RPC_U8(&msg, 16U) = (uint8_t)mr; in sc_rm_memreg_split()
445 sc_err_t sc_rm_memreg_free(sc_ipc_t ipc, sc_rm_mr_t mr) in sc_rm_memreg_free() argument
453 RPC_U8(&msg, 0U) = (uint8_t)mr; in sc_rm_memreg_free()
462 sc_err_t sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, in sc_rm_find_memreg() argument
480 if (mr != NULL) { in sc_rm_find_memreg()
481 *mr = RPC_U8(&msg, 0U); in sc_rm_find_memreg()
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| /rk3399_ARM-atf/drivers/nxp/ddr/phy-gen2/ |
| H A D | input.h | 96 unsigned int mr[7]; member
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| H A D | phy.c | 805 debug("mr[%d] = 0x%x\n", i, input->mr[i]); in phy_gen2_init_input()
909 msg_blk->mr0 = input->mr[0]; in phy_gen2_msg_init()
910 msg_blk->mr1 = input->mr[1]; in phy_gen2_msg_init()
911 msg_blk->mr2 = input->mr[2]; in phy_gen2_msg_init()
912 msg_blk->mr3 = input->mr[3]; in phy_gen2_msg_init()
913 msg_blk->mr4 = input->mr[4]; in phy_gen2_msg_init()
914 msg_blk->mr5 = input->mr[5]; in phy_gen2_msg_init()
915 msg_blk->mr6 = input->mr[6]; in phy_gen2_msg_init()
2532 input.mr[0] = regs->sdram_mode[0] & U(0xffff); in compute_ddr_phy()
2533 input.mr[1] = regs->sdram_mode[0] >> 16U; in compute_ddr_phy()
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| /rk3399_ARM-atf/fdts/ |
| H A D | stm32mp25-ddr.dtsi | 192 st,phy-mr = <
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