| /rk3399_ARM-atf/bl31/ |
| H A D | bl31_main.c | 108 unsigned int core_pos = plat_my_core_pos(); in bl31_main() local 121 detect_arch_features(core_pos); in bl31_main() 128 cm_manage_extensions_el3(core_pos); in bl31_main() 158 gic_init(core_pos); in bl31_main() 159 gic_pcpu_init(core_pos); in bl31_main() 160 gic_cpuif_enable(core_pos); in bl31_main() 242 unsigned int core_pos = plat_my_core_pos(); in bl31_warmboot() local 246 detect_arch_features(core_pos); in bl31_warmboot() 272 cm_manage_extensions_el3(core_pos); in bl31_warmboot() 291 psci_warmboot_entrypoint(core_pos); in bl31_warmboot()
|
| /rk3399_ARM-atf/lib/extensions/amu/aarch32/ |
| H A D | amu.c | 54 unsigned int core_pos = plat_my_core_pos(); in amu_enable() local 57 assert((get_amu_aux_enables(core_pos) & ~AMCNTENSET1_Pn_MASK) == 0); in amu_enable() 58 write_amcntenset1(get_amu_aux_enables(core_pos)); in amu_enable() 82 unsigned int core_pos = *(unsigned int *)arg; in amu_context_save() local 83 amu_regs_t *ctx = &amu_ctx[core_pos]; in amu_context_save() 88 write_amcntenclr1(get_amu_aux_enables(core_pos)); in amu_context_save() 166 unsigned int core_pos = *(unsigned int *)arg; in amu_context_restore() local 167 amu_regs_t *ctx = &amu_ctx[core_pos]; in amu_context_restore() 237 write_amcntenset1(get_amu_aux_enables(core_pos)); in amu_context_restore()
|
| /rk3399_ARM-atf/plat/arm/board/arm_fpga/ |
| H A D | fpga_topology.c | 56 unsigned int core_pos; in plat_core_pos_by_mpidr() local 69 core_pos = plat_fpga_calc_core_pos(mpidr); in plat_core_pos_by_mpidr() 72 if (fpga_valid_mpids[core_pos] != VALID_MPID) { in plat_core_pos_by_mpidr() 76 return core_pos; in plat_core_pos_by_mpidr()
|
| /rk3399_ARM-atf/plat/xilinx/zynqmp/ |
| H A D | plat_zynqmp.c | 13 int32_t core_pos = -1; in plat_core_pos_by_mpidr() local 17 core_pos = (int32_t)zynqmp_calc_core_pos(mpidr); in plat_core_pos_by_mpidr() 20 return core_pos; in plat_core_pos_by_mpidr()
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_gicv3.c | 37 unsigned int core_pos = plat_my_core_pos(); in fvp_gicv3_make_rdistrif_rw() local 40 if (fvp_gicr_rw_region_init[core_pos] != true) { in fvp_gicv3_make_rdistrif_rw() 42 (core_pos * BASE_GICR_SIZE), in fvp_gicv3_make_rdistrif_rw() 53 fvp_gicr_rw_region_init[core_pos] = true; in fvp_gicv3_make_rdistrif_rw()
|
| /rk3399_ARM-atf/lib/extensions/amu/aarch64/ |
| H A D | amu.c | 60 void amu_init_el3(unsigned int core_pos) in amu_init_el3() argument 74 assert((get_amu_aux_enables(core_pos) & ~AMCNTENSET1_EL0_Pn_MASK) == 0); in amu_init_el3() 75 write_amcntenset1_el0(get_amu_aux_enables(core_pos)); in amu_init_el3() 114 unsigned int core_pos = *(unsigned int *)arg; in amu_context_save() local 120 write_amcntenclr1_el0(get_amu_aux_enables(core_pos)); in amu_context_save() 198 unsigned int core_pos = *(unsigned int *)arg; in amu_context_restore() local 269 write_amcntenset1_el0(get_amu_aux_enables(core_pos)); in amu_context_restore()
|
| /rk3399_ARM-atf/plat/renesas/rcar_gen5/ |
| H A D | plat_pm_scmi.c | 80 static void css_scp_core_pos_to_scmi_channel(unsigned int core_pos, in css_scp_core_pos_to_scmi_channel() argument 85 composite_id = plat_css_core_pos_to_scmi_dmn_id_map[core_pos]; in css_scp_core_pos_to_scmi_channel() 97 unsigned int channel_id, core_pos, domain_id; in rcar_scmi_cpuon() local 101 core_pos = rcar_pwrc_core_pos(mpidr); in rcar_scmi_cpuon() 102 assert(core_pos < PLATFORM_CORE_COUNT); in rcar_scmi_cpuon() 104 css_scp_core_pos_to_scmi_channel(core_pos, &domain_id, in rcar_scmi_cpuon()
|
| /rk3399_ARM-atf/drivers/arm/css/scp/ |
| H A D | css_pm_scmi.c | 106 static void css_scp_core_pos_to_scmi_channel(unsigned int core_pos, in css_scp_core_pos_to_scmi_channel() argument 111 composite_id = plat_css_core_pos_to_scmi_dmn_id_map[core_pos]; in css_scp_core_pos_to_scmi_channel() 237 unsigned int lvl = 0, channel_id, core_pos, domain_id; in css_scp_on() local 247 core_pos = (unsigned int)plat_core_pos_by_mpidr(mpidr); in css_scp_on() 248 assert(core_pos < PLATFORM_CORE_COUNT); in css_scp_on() 250 css_scp_core_pos_to_scmi_channel(core_pos, &domain_id, in css_scp_on() 331 unsigned int core_pos = plat_my_core_pos(); in css_scp_system_off() local 335 ret = psci_stop_other_cores(core_pos, 0, css_raise_pwr_down_interrupt); in css_scp_system_off() 344 gic_cpuif_disable(core_pos); in css_scp_system_off() 345 gic_pcpu_off(core_pos); in css_scp_system_off()
|
| /rk3399_ARM-atf/plat/socionext/synquacer/drivers/scp/ |
| H A D | sq_scmi.c | 138 int lvl = 0, ret, core_pos; in sq_scmi_on() local 147 core_pos = plat_core_pos_by_mpidr(mpidr); in sq_scmi_on() 148 assert(core_pos >= 0 && core_pos < PLATFORM_CORE_COUNT); in sq_scmi_on() 151 sq_core_pos_to_scmi_dmn_id_map[core_pos], in sq_scmi_on()
|
| /rk3399_ARM-atf/plat/arm/common/sp_min/ |
| H A D | arm_sp_min_setup.c | 216 unsigned int core_pos = plat_my_core_pos(); in sp_min_platform_setup() local 221 gic_init(core_pos); in sp_min_platform_setup() 222 gic_pcpu_init(core_pos); in sp_min_platform_setup() 223 gic_cpuif_enable(core_pos); in sp_min_platform_setup()
|
| /rk3399_ARM-atf/include/lib/extensions/ |
| H A D | amu.h | 20 void amu_init_el3(unsigned int core_pos); 32 void amu_init_el3(unsigned int core_pos) in amu_init_el3() argument
|
| /rk3399_ARM-atf/include/common/ |
| H A D | feat_detect.h | 11 void detect_arch_features(unsigned int core_pos);
|
| /rk3399_ARM-atf/plat/arm/css/common/ |
| H A D | css_pm.c | 345 unsigned int core_pos = plat_my_core_pos(); in css_reboot_interrupt_handler() local 356 gic_cpuif_disable(core_pos); in css_reboot_interrupt_handler() 357 gic_pcpu_off(core_pos); in css_reboot_interrupt_handler()
|
| /rk3399_ARM-atf/plat/qti/common/src/ |
| H A D | qti_pm.c | 147 int core_pos = plat_core_pos_by_mpidr(mpidr); in qti_cpu_power_on() local 150 if (core_pos < 0 || core_pos >= QTISECLIB_PLAT_CORE_COUNT) { in qti_cpu_power_on()
|
| /rk3399_ARM-atf/plat/nxp/common/psci/ |
| H A D | plat_psci.c | 36 int core_pos = plat_core_pos(mpidr); in _pwr_domain_on() local 40 if (core_pos >= 0 && core_pos < PLATFORM_CORE_COUNT) { in _pwr_domain_on() 47 core_mask = (1 << core_pos); in _pwr_domain_on()
|
| /rk3399_ARM-atf/common/ |
| H A D | feat_detect.c | 354 void detect_arch_features(unsigned int core_pos) in detect_arch_features() argument 357 if (detection_done[core_pos]) { in detect_arch_features() 522 detection_done[core_pos] = true; in detect_arch_features()
|
| /rk3399_ARM-atf/drivers/renesas/rcar_gen4/pwrc/ |
| H A D | pwrc.c | 285 uint32_t core_pos, cpu, i, j, prr, state; in rcar_pwrc_cpu_on_check() local 288 core_pos = rcar_pwrc_core_pos(mpidr); in rcar_pwrc_cpu_on_check() 304 if (core_pos != cpu) { in rcar_pwrc_cpu_on_check()
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_psci_handlers.c | 200 uint32_t core_pos = (uint32_t)read_mpidr() & (uint32_t)MPIDR_CPU_MASK; in tegra_get_afflvl1_pwr_state() local 203 plat_local_state_t target = states[core_pos]; in tegra_get_afflvl1_pwr_state()
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/ |
| H A D | plat_psci_handlers.c | 209 uint32_t core_pos = (uint32_t)read_mpidr() & (uint32_t)MPIDR_CPU_MASK; in tegra_get_afflvl1_pwr_state() local 210 plat_local_state_t target = states[core_pos]; in tegra_get_afflvl1_pwr_state()
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 107 int core_pos = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_get_target_pwr_state() local 113 target = *(states + core_pos); in tegra_soc_get_target_pwr_state()
|