| /rk3399_ARM-atf/plat/nxp/common/soc_errata/ |
| H A D | errata.c | 15 INFO("SoC workaround for Errata A050426 was applied\n"); in soc_errata()
19 INFO("SoC workaround for Errata A008850 Early-Phase was applied\n"); in soc_errata()
23 INFO("SoC workaround for Errata A009660 was applied\n"); in soc_errata()
27 INFO("SoC workaround for Errata A010539 was applied\n"); in soc_errata()
36 INFO("SoC workaround for DDR Errata A011396 was applied\n"); in soc_errata()
39 INFO("SoC workaround for DDR Errata A050450 was applied\n"); in soc_errata()
42 INFO("SoC workaround for DDR Errata A050958 was applied\n"); in soc_errata()
45 INFO("SoC workaround for DDR Errata A008511 was applied\n"); in soc_errata()
48 INFO("SoC workaround for DDR Errata A009803 was applied\n"); in soc_errata()
51 INFO("SoC workaround for DDR Errata A009942 was applied\n"); in soc_errata()
[all …]
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| /rk3399_ARM-atf/docs/design_documents/ |
| H A D | measured_boot_dtpm_poc.rst | 283 INFO: BL1: RAM 0x100ee000 - 0x100f9000
284 INFO: Using crypto library 'mbed TLS'
287 INFO: BL1: Loading BL2
288 INFO: Loading image id=1 at address 0x100b4000
289 INFO: Image id=1 loaded: 0x100b4000 - 0x100c0281
290 INFO: TCG_EfiSpecIDEvent:
291 INFO: PCRIndex : 0
292 INFO: EventType : 3
293 INFO: Digest : 00
294 INFO: : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[all …]
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| H A D | rse.rst | 384 INFO: Measured boot extend measurement:
385 INFO: - slot : 6
386 INFO: - signer_id : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
387 INFO: : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
388 INFO: - version :
389 INFO: - version_size: 0
390 INFO: - sw_type : FW_CONFIG
391 INFO: - sw_type_size: 10
392 INFO: - algorithm : 2000009
393 INFO: - measurement : aa ea d3 a7 a8 e2 ab 7d 13 a6 cb 34 99 10 b9 a1
[all …]
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| /rk3399_ARM-atf/plat/brcm/board/stingray/src/ |
| H A D | scp_utils.c | 91 INFO("SCP Patch is already active.\n"); in plat_bcm_bl2_plat_handle_scp_bl2()
104 INFO("AP booted by Nitro\n"); in plat_bcm_bl2_plat_handle_scp_bl2()
120 INFO("MCU Patch Point: 0x%x\n", in plat_bcm_bl2_plat_handle_scp_bl2()
139 INFO("SCP Patch successfully initialized.\n"); in plat_bcm_bl2_plat_handle_scp_bl2()
144 INFO("SCP Patch version :0x%x\n", scp_patch_version); in plat_bcm_bl2_plat_handle_scp_bl2()
158 INFO("AVS voltages from cfg (including margin)\n"); in plat_bcm_bl2_plat_handle_scp_bl2()
160 INFO("%s\tVCORE: %dmv\n", in plat_bcm_bl2_plat_handle_scp_bl2()
164 INFO("%s\tIHOST03: %dmv\n", in plat_bcm_bl2_plat_handle_scp_bl2()
168 INFO("%s\tIHOST12: %dmv\n", in plat_bcm_bl2_plat_handle_scp_bl2()
172 INFO("AVS settings not applicable\n"); in plat_bcm_bl2_plat_handle_scp_bl2()
[all …]
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| H A D | pm.c | 40 INFO("mpidr :%lu, cpuid:%d\n", mpidr, cpuid); in brcm_pwr_domain_on()
68 INFO("Cluster #%lu entering to snoop/dvm domain\n", cluster_id); in brcm_pwr_domain_on_finish()
78 INFO("Gic Initialization done for this affinity instance\n"); in brcm_pwr_domain_on_finish()
89 INFO("System rebooting - L%d...\n", reset_type); in brcm_system_reset()
101 INFO("System rebooting - L%d...\n", reset_type); in brcm_system_reset2()
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| H A D | bl2_setup.c | 141 INFO("NIC mode detected; PCIe reset/rescal not executed\n"); in brcm_stingray_pcie_reset()
168 INFO("PCIE SATA Rescal Init done\n"); in brcm_stingray_pcie_reset()
345 INFO("Regulator supply got stable\n"); in set_swreg_based_on_otp()
430 INFO("DDR channel index: %d\n", ddr_info.mcb[i].idx); in board_detect_fru()
431 INFO("DDR size %u GB\n", ddr_info.mcb[i].size_mb / 1024); in board_detect_fru()
432 INFO("DDR ref ID by SW (Not MCB Ref ID) 0x%x\n", in board_detect_fru()
438 INFO("**** FRU board information ****\n"); in board_detect_fru()
439 INFO("Language 0x%x\n", board_info.lang); in board_detect_fru()
440 INFO("Manufacturing Date %u.%02u.%02u, %02u:%02u\n", in board_detect_fru()
443 INFO("Manufacturing Date(Raw) 0x%x\n", board_info.mfg_date); in board_detect_fru()
[all …]
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| /rk3399_ARM-atf/plat/brcm/board/stingray/driver/ext_sram_init/ |
| H A D | ext_sram_init.c | 21 INFO(" - pnor pinmux init start.\n"); in brcm_stingray_pnor_pinmux_init()
160 INFO(" - pnor pinmux init done.\n"); in brcm_stingray_pnor_pinmux_init()
185 INFO(" - pnor sram init start.\n"); in brcm_stingray_pnor_sram_init()
188 INFO(" -- enable pnor clock\n"); in brcm_stingray_pnor_sram_init()
193 INFO(" -- reset pnor\n"); in brcm_stingray_pnor_sram_init()
200 INFO(" -- configure pnor slave address to chip-select mapping\n"); in brcm_stingray_pnor_sram_init()
224 INFO(" -- pnor primecell_id = 0x%x\n", tmp); in brcm_stingray_pnor_sram_init()
233 INFO(" -- pnor set_cycles = 0x%x\n", val); in brcm_stingray_pnor_sram_init()
251 INFO(" -- pnor set_opmode = 0x%x\n", val); in brcm_stingray_pnor_sram_init()
257 INFO(" -- pnor refresh_0 = 0x%x\n", val); in brcm_stingray_pnor_sram_init()
[all …]
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| /rk3399_ARM-atf/docs/plat/ |
| H A D | intel-stratix10.rst | 71 INFO: DDR: DRAM calibration success.
72 INFO: ECC is disabled.
73 INFO: Init HPS NOC's DDR Scheduler.
76 INFO: BL2: Doing platform setup
77 INFO: BL2: Loading image id 3
78 INFO: Loading image id=3 at address 0xffe1c000
79 INFO: Image id=3 loaded: 0xffe1c000 - 0xffe24034
80 INFO: BL2: Loading image id 5
81 INFO: Loading image id=5 at address 0x50000
82 INFO: Image id=5 loaded: 0x50000 - 0x550000
[all …]
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| H A D | intel-agilex.rst | 71 INFO: DDR: DRAM calibration success.
72 INFO: ECC is disabled.
75 INFO: BL2: Doing platform setup
77 INFO: Entry point address = 0xffe1c000
78 INFO: SPSR = 0x3cd
81 INFO: ARM GICv2 driver initialized
82 INFO: BL31: Initializing runtime services
84 INFO: BL31: Preparing for EL3 exit to normal world
85 INFO: Entry point address = 0x50000
86 INFO: SPSR = 0x3c9
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| H A D | poplar.rst | 118 INFO: BL1: 0xe1000 - 0xe7000 [size = 24576]
122 INFO: BL1: RAM 0xe1000 - 0xe7000
123 INFO: BL1: Loading BL2
124 INFO: Loading image id=1 at address 0xe9000
125 INFO: Image id=1 loaded at address 0xe9000, size = 0x5008
127 INFO: Entry point address = 0xe9000
128 INFO: SPSR = 0x3c5
131 INFO: BL2: Loading BL31
132 INFO: Loading image id=3 at address 0x129000
133 INFO: Image id=3 loaded at address 0x129000, size = 0x8038
[all …]
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| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_spmd_logical_sp.c | 57 INFO("Number of secure partitions = %d\n", num_partitions); in fvp_get_partition_info()
60 INFO("***Start Partition***\n"); in fvp_get_partition_info()
63 INFO("\tPartition ID: 0x%x\n", part_info[i].ep_id); in fvp_get_partition_info()
64 INFO("\tvCPU count:0x%x\n", part_info[i].execution_ctx_count); in fvp_get_partition_info()
65 INFO("\tProperties: 0x%x\n", part_info[i].properties); in fvp_get_partition_info()
66 INFO("\tUUID: 0x%x 0x%x 0x%x 0x%x\n", part_info[i].uuid[0], in fvp_get_partition_info()
69 INFO("***End Partition***\n"); in fvp_get_partition_info()
76 INFO("FVP SPMD LSP: Init function called.\n"); in fvp_spmd_logical_partition_init()
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| /rk3399_ARM-atf/plat/intel/soc/common/drivers/wdt/ |
| H A D | watchdog.c | 22 INFO("Component Type : %x\r\n", mmio_read_32(WDT_COMP_VERSION)); in watchdog_info()
23 INFO("Component Version : %x\r\n", mmio_read_32(WDT_COMP_TYPE)); in watchdog_info()
30 INFO("Watchdog Timer is currently enabled\n"); in watchdog_status()
31 INFO("Current Counter : 0x%x\r\n", mmio_read_32(WDT_CCVR)); in watchdog_status()
33 INFO("Watchdog Timer is currently disabled\n"); in watchdog_status()
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| /rk3399_ARM-atf/lib/psa/ |
| H A D | measured_boot.c | 31 INFO("\t\t:"); in print_byte_array()
51 INFO("Measured boot extend measurement:\n"); in log_measurement()
52 INFO(" - slot : %u\n", index); in log_measurement()
53 INFO(" - signer_id :"); in log_measurement()
55 INFO(" - version : %s\n", version); in log_measurement()
56 INFO(" - version_size: %zu\n", version_size); in log_measurement()
57 INFO(" - sw_type : %s\n", sw_type); in log_measurement()
58 INFO(" - sw_type_size: %zu\n", sw_type_size); in log_measurement()
59 INFO(" - algorithm : %x\n", measurement_algo); in log_measurement()
60 INFO(" - measurement :"); in log_measurement()
[all …]
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| /rk3399_ARM-atf/plat/arm/board/morello/ |
| H A D | morello_bl2_setup.c | 33 INFO("Total DIMM size: %uGB\n", in dmc_ecc_setup()
39 INFO("Zeroing DDR memory range 0x80000000 - 0xFFFFFFFF\n"); in dmc_ecc_setup()
43 INFO("Zeroing DDR memory range 0x%llx - 0x%llx\n", in dmc_ecc_setup()
73 INFO("Configuring DMC Bing in client mode\n"); in dmc_ecc_setup()
97 INFO("C1 Tag Cache Enabled\n"); in dmc_ecc_setup()
103 INFO("C2 Tag Cache Enabled\n"); in dmc_ecc_setup()
120 INFO("Tag base set to 0x%lx\n", tag_mem_base); in dmc_ecc_setup()
123 INFO("Configuring DMC Bing in server mode\n"); in dmc_ecc_setup()
128 INFO("Enabling ECC on DMCs\n"); in dmc_ecc_setup()
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| /rk3399_ARM-atf/bl32/tsp/ |
| H A D | tsp_main.c | 34 INFO("TSP: Total memory base : 0x%lx\n", (unsigned long) BL32_BASE); in tsp_main()
35 INFO("TSP: Total memory size : 0x%lx bytes\n", BL32_TOTAL_SIZE); in tsp_main()
50 INFO("TSP: cpu 0x%lx: %u smcs, %u erets %u cpu on requests\n", in tsp_main()
77 INFO("TSP: cpu 0x%lx turned on\n", read_mpidr()); in tsp_cpu_on_main()
78 INFO("TSP: cpu 0x%lx: %u smcs, %u erets %u cpu on requests\n", in tsp_cpu_on_main()
114 INFO("TSP: cpu 0x%lx off request\n", read_mpidr()); in tsp_cpu_off_main()
115 INFO("TSP: cpu 0x%lx: %u smcs, %u erets %u cpu off requests\n", in tsp_cpu_off_main()
153 INFO("TSP: cpu 0x%lx: %u smcs, %u erets %u cpu suspend requests\n", in tsp_cpu_suspend_main()
187 INFO("TSP: cpu 0x%lx resumed. maximum off power level %" PRIu64 "\n", in tsp_cpu_resume_main()
189 INFO("TSP: cpu 0x%lx: %u smcs, %u erets %u cpu resume requests\n", in tsp_cpu_resume_main()
[all …]
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| /rk3399_ARM-atf/lib/optee/ |
| H A D | optee_utils.c | 118 INFO("OPTEE ep=0x%x\n", (unsigned int)header_ep->pc); in parse_optee_header()
119 INFO("OPTEE header info:\n"); in parse_optee_header()
120 INFO(" magic=0x%x\n", header->magic); in parse_optee_header()
121 INFO(" version=0x%x\n", header->version); in parse_optee_header()
122 INFO(" arch=0x%x\n", header->arch); in parse_optee_header()
123 INFO(" flags=0x%x\n", header->flags); in parse_optee_header()
124 INFO(" nb_images=0x%x\n", header->nb_images); in parse_optee_header()
144 INFO("Invalid OPTEE header, set legacy mode.\n"); in parse_optee_header()
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| /rk3399_ARM-atf/plat/arm/board/juno/ |
| H A D | juno_security.c | 163 INFO("TZC protected shared memory base address for TZMP usecase: %p\n", in plat_arm_security_setup()
165 INFO("TZC protected shared memory end address for TZMP usecase: %p\n", in plat_arm_security_setup()
169 INFO("TZC protected shared memory range for NPU TZMP usecase: %p - %p\n", in plat_arm_security_setup()
172 INFO("TZC protected Data memory range for NPU TZMP usecase: %p - %p\n", in plat_arm_security_setup()
175 INFO("TZC protected FW memory range for NPU TZMP usecase: %p - %p\n", in plat_arm_security_setup()
179 INFO("TZC protected some of Nor flash memory range for StandaloneMm: %p - %p\n", in plat_arm_security_setup()
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| /rk3399_ARM-atf/plat/st/stm32mp1/ |
| H A D | bl2_plat_setup.c | 63 INFO("Reset reason (0x%x):\n", rstsr); in print_reset_reason()
67 INFO("System exits from STANDBY\n"); in print_reset_reason()
72 INFO("MPU exits from CSTANDBY\n"); in print_reset_reason()
78 INFO(" Power-on Reset (rst_por)\n"); in print_reset_reason()
83 INFO(" Brownout Reset (rst_bor)\n"); in print_reset_reason()
90 INFO(" System reset generated by MCU (MCSYSRST)\n"); in print_reset_reason()
92 INFO(" Local reset generated by MCU (MCSYSRST)\n"); in print_reset_reason()
99 INFO(" System reset generated by MPU (MPSYSRST)\n"); in print_reset_reason()
104 INFO(" Reset due to a clock failure on HSE\n"); in print_reset_reason()
109 INFO(" IWDG1 Reset (rst_iwdg1)\n"); in print_reset_reason()
[all …]
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| /rk3399_ARM-atf/plat/rockchip/rk3568/drivers/pmu/ |
| H A D | pmu.c | 71 INFO("WAKEUP: PMU_WAKEUP_INT_CON:0x%x, reg: 0x%x\n", in pmu_wakeup_source_config()
89 INFO("PLL: PMU_PLLPD_CON(0x%x):0x%x\n", in pmu_pll_powerdown_config()
186 INFO("PD & BUS:PMU_PWR_DWN_ST(0x%x):0x%x\n", in pmu_pd_powerdown_config()
188 INFO("PD & BUS:PMU_PWR_GATE_CON(0x%x):0x%x\n", in pmu_pd_powerdown_config()
190 INFO("PD & BUS:PMU_BUS_IDLE_CON0(0x%x):0x%x\n", in pmu_pd_powerdown_config()
192 INFO("PD & BUS:PMU_BUS_IDLE_CON1(0x%x):0x%x\n", in pmu_pd_powerdown_config()
194 INFO("PD & BUS:PMU_PWR_CON(0x%x):0x%x\n", in pmu_pd_powerdown_config()
218 INFO("DDR: PMU_PLLPD_CON(0x%x):0x%x\n", in pmu_ddr_suspend_config()
220 INFO("DDR: PMU_DDR_PWR_CON(0x%x):\t0x%x\n", in pmu_ddr_suspend_config()
224 INFO("\t DDR_SREF_ENA\n"); in pmu_ddr_suspend_config()
[all …]
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| /rk3399_ARM-atf/plat/allwinner/sun50i_h616/ |
| H A D | sunxi_power.c | 123 INFO("Could not init platform bus: %d\n", ret); in pmic_bus_init()
148 INFO("No DTB, skipping PMIC detection and setup\n"); in sunxi_pmic_setup()
172 INFO("PMIC: No known PMIC in DT, skipping setup.\n"); in sunxi_pmic_setup()
193 INFO("Probing for PMIC on %s:\n", is_using_rsb() ? "RSB" : "I2C"); in sunxi_pmic_setup()
204 INFO("PMIC: found AXP305, setting up regulators\n"); in sunxi_pmic_setup()
214 INFO("PMIC: found AXP313\n"); in sunxi_pmic_setup()
222 INFO("PMIC: found AXP717\n"); in sunxi_pmic_setup()
236 INFO("Incompatible or unknown PMIC found.\n"); in sunxi_pmic_setup()
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| /rk3399_ARM-atf/plat/brcm/board/common/ |
| H A D | board_arm_trusted_boot.c | 73 INFO("NOT AB\n"); in plat_is_trusted_boot()
77 INFO("AB\n"); in plat_is_trusted_boot()
207 INFO("NON-AB: Do not read DAUTH!\n"); in plat_get_rotpk_info()
215 INFO("readKeys (DAUTH) from BL11\n"); in plat_get_rotpk_info()
234 INFO("SOTP erased, Use internal key hash.\n"); in plat_get_rotpk_info()
239 INFO("AB DEV: FAST AUTH!\n"); in plat_get_rotpk_info()
251 INFO("sotp_read_key (DAUTH): %i\n", ret); in plat_get_rotpk_info()
267 INFO("SOTP NOT PROGRAMMED: Do not use DAUTH!\n"); in plat_get_rotpk_info()
273 INFO("Use internal key hash.\n"); in plat_get_rotpk_info()
280 INFO("No hash found in SOTP\n"); in plat_get_rotpk_info()
[all …]
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/apusys/ |
| H A D | mtk_apusys.c | 19 INFO("[APUSYS] ops=0x%x\n", request_ops); in apusys_kernel_ctrl()
45 INFO("[APUSYS] reviser_ctxt=%x,%x\n", in apusys_kernel_ctrl()
48 INFO("[APUSYS]fw=0x%08x,boot=0x%08x,def=0x%08x,sys=0x%08x\n", in apusys_kernel_ctrl()
58 INFO("[APUSYS] md32_boot_ctrl=0x%08x,runstall=0x%08x\n", in apusys_kernel_ctrl()
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| /rk3399_ARM-atf/plat/nxp/common/warm_reset/ |
| H A D | plat_warm_reset.c | 37 INFO("Not a SW(Warm) triggered reset.\n"); in is_warm_boot()
44 INFO("Warm Reset was triggered..\n"); in is_warm_boot()
46 INFO("Warm Reset was not triggered..\n"); in is_warm_boot()
112 INFO("Doing DDR Self refresh.\n"); in prep_n_execute_warm_reset()
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| /rk3399_ARM-atf/docs/plat/qti/ |
| H A D | msm8916.rst | 158 INFO: BL31: Platform setup start
159 INFO: ARM GICv2 driver initialized
160 INFO: BL31: Platform setup done
161 INFO: BL31: Initializing runtime services
162 INFO: BL31: cortex_a53: CPU workaround for 819472 was applied
163 INFO: BL31: cortex_a53: CPU workaround for 824069 was applied
164 INFO: BL31: cortex_a53: CPU workaround for 826319 was applied
165 INFO: BL31: cortex_a53: CPU workaround for 827319 was applied
166 INFO: BL31: cortex_a53: CPU workaround for 835769 was applied
167 INFO: BL31: cortex_a53: CPU workaround for disable_non_temporal_hint was applied
[all …]
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| /rk3399_ARM-atf/plat/mediatek/lib/system_reset/ |
| H A D | reset_cros.c | 28 INFO("MTK System Reset\n"); in mtk_system_reset_cros()
39 INFO("MTK System Off\n"); in mtk_system_off_cros()
62 INFO("Reset init\n"); in lib_reset_ctrl_init()
|