History log of /rk3399_ARM-atf/docs/plat/intel-stratix10.rst (Results 1 – 10 of 10)
Revision Date Author Comments
# d11a6057 10-Jan-2020 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge "Revert "GCC: Upgrade to version 9.2-2019.12 of toolchain"" into integration


# 650a435c 08-Jan-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Revert "GCC: Upgrade to version 9.2-2019.12 of toolchain"

This reverts commit de9bf1d8a2de952bfc17cdf7082b41f9c185e54d.

Change-Id: Iebb6297ce290a10ee850bf6a9c71e7eb530b085f


# eafdc558 06-Jan-2020 Mark Dykes <mardyk01@review.trustedfirmware.org>

Merge "GCC: Upgrade to version 9.2-2019.12 of toolchain" into integration


# de9bf1d8 02-Jan-2020 Madhukar Pappireddy <madhukar.pappireddy@arm.com>

GCC: Upgrade to version 9.2-2019.12 of toolchain

This toolchain provides multiple cross compilers and are publicly
available on www.developer.arm.com

We thoroughly test TF-A in CI using:
AArch32 ba

GCC: Upgrade to version 9.2-2019.12 of toolchain

This toolchain provides multiple cross compilers and are publicly
available on www.developer.arm.com

We thoroughly test TF-A in CI using:
AArch32 bare-metal target (arm-none-eabi)
AArch64 ELF bare-metal target (aarch64-none-elf)

Change-Id: I2360a3ac6705c68dca781b85e9894867df255b3e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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# 32d514e5 27-Sep-2019 Soby Mathew <soby.mathew@arm.com>

Merge "doc: Fix platform port inclusion" into integration


# f1e0f152 25-Sep-2019 Paul Beesley <paul.beesley@arm.com>

doc: Fix platform port inclusion

This patch:

- Adds any leftover platform ports that were not having their
documentation built (not in the index.rst table of contents)
- Corrects a handful of RST

doc: Fix platform port inclusion

This patch:

- Adds any leftover platform ports that were not having their
documentation built (not in the index.rst table of contents)
- Corrects a handful of RST formatting errors that cause poor
rendering
- Reorders the list of platforms so that they are displayed
in alphabetical order

Change-Id: If8c135a822d581c3c5c4fca2936d501ccfd2e94c
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

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# ced17112 23-May-2019 Sandrine Bailleux <sandrine.bailleux@arm.com>

Merge changes from topic "pb/sphinx-doc" into integration

* changes:
doc: Use proper note and warning annotations
doc: Refactor contributor acknowledgements
doc: Reorganise images and update l

Merge changes from topic "pb/sphinx-doc" into integration

* changes:
doc: Use proper note and warning annotations
doc: Refactor contributor acknowledgements
doc: Reorganise images and update links
doc: Set correct syntax highlighting style
doc: Add minimal glossary
doc: Remove per-page contents lists
doc: Make checkpatch ignore rst files
doc: Format security advisory titles and headings
doc: Reformat platform port documents
doc: Normalise section numbering and headings
doc: Reword document titles

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# 24dba2b3 22-May-2019 Paul Beesley <paul.beesley@arm.com>

doc: Reformat platform port documents

The platform port documents are not very standardised right now and
they don't integrate properly into the document tree so:

1) Make sure each port has a prope

doc: Reformat platform port documents

The platform port documents are not very standardised right now and
they don't integrate properly into the document tree so:

1) Make sure each port has a proper name and title (incl. owner)
2) Correct use of headings, subheadings, etc in each port
3) Resolve any naming conflicts between documents

Change-Id: I4c2da6f57172b7f2af3512e766ae9ce3b840b50f
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

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# 39718ea5 27-Feb-2019 Antonio Niño Díaz <antonio.ninodiaz@arm.com>

Merge pull request #1834 from thloh85-intel/s10_bl31

plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform


# 1cf55aba 26-Feb-2019 Tien Hock, Loh <tien.hock.loh@intel.com>

plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform

This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A
supports:
- PSCI calls to enable 4 CPU cores
- PSCI mailbox

plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform

This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A
supports:
- PSCI calls to enable 4 CPU cores
- PSCI mailbox calls for FPGA reconfiguration

Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>

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