Searched refs:ARM_BL_RAM_BASE (Results 1 – 14 of 14) sorted by relevance
48 #define ARM_BL_RAM_BASE (FVP_VE_SHARED_RAM_BASE + \ macro126 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \128 - ARM_BL_RAM_BASE), \187 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))188 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \195 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))207 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \210 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \230 #define BL32_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\233 #define BL32_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
65 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ macro77 #define BL32_BASE (ARM_BL_RAM_BASE + PAGE_SIZE)78 #define BL32_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)92 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))93 #define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE / 2U))106 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))220 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \222 - ARM_BL_RAM_BASE), \
356 ARM_BL_RAM_BASE, \357 (ARM_FW_CONFIGS_LIMIT - ARM_BL_RAM_BASE), \397 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))399 (ARM_BL_RAM_BASE + PAGE_SIZE) + (PAGE_SIZE / 2U))412 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))425 #define BL1_RW_BASE (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE - \427 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \445 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)493 #define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) - \504 #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
523 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ macro526 ARM_BL_RAM_BASE)536 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))537 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \553 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE)555 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + ARM_FW_CONFIGS_SIZE)562 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \565 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \584 #define BL31_BASE ((ARM_BL_RAM_BASE + \589 #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)[all …]
76 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ macro443 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \445 - ARM_BL_RAM_BASE), \548 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))549 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \566 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + ARM_FW_CONFIGS_SIZE)587 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \591 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \618 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)659 #define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\[all …]
134 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE) macro144 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)154 #define BL32_BASE ARM_BL_RAM_BASE204 #define ARM_BL2_MEM_DESC_LIMIT ARM_BL_RAM_BASE
11 #define TB_SOC_FW_ADDR (ARM_BL_RAM_BASE + 0x300)12 #define TOS_FW_ADDR (ARM_BL_RAM_BASE + 0x500)
190 #define PLAT_ARM_EL3_FW_HANDOFF_BASE ARM_BL_RAM_BASE347 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \
193 if (image_base < ARM_BL_RAM_BASE) { in arm_bl2_dyn_cfg_init()
92 bl1_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl1_early_platform_setup()
118 bl2_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl2_early_platform_setup()
109 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE) macro
43 #define PLAT_ARM_EL3_FW_HANDOFF_BASE ARM_BL_RAM_BASE
191 #define PLAT_ARM_EL3_FW_HANDOFF_BASE ARM_BL_RAM_BASE