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Searched refs:ARM_BL_RAM_BASE (Results 1 – 15 of 15) sorted by relevance

/rk3399_ARM-atf/plat/arm/board/fvp_ve/include/
H A Dplatform_def.h48 #define ARM_BL_RAM_BASE (FVP_VE_SHARED_RAM_BASE + \ macro
126 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \
128 - ARM_BL_RAM_BASE), \
187 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
188 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \
195 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
207 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \
210 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
230 #define BL32_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\
233 #define BL32_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
/rk3399_ARM-atf/plat/arm/board/a5ds/include/
H A Dplatform_def.h33 #define ARM_BL_RAM_BASE (A5DS_SHARED_RAM_BASE + \ macro
157 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \
159 - ARM_BL_RAM_BASE), \
202 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
203 #define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + PAGE_SIZE)
209 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
224 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \
227 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
244 #define BL32_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\
247 #define BL32_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
/rk3399_ARM-atf/plat/arm/board/corstone700/common/include/
H A Dplatform_def.h65 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ macro
77 #define BL32_BASE (ARM_BL_RAM_BASE + PAGE_SIZE)
78 #define BL32_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
92 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
93 #define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE / 2U))
106 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
220 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \
222 - ARM_BL_RAM_BASE), \
/rk3399_ARM-atf/include/plat/nuvoton/common/
H A Dnpcm845x_arm_def.h356 ARM_BL_RAM_BASE, \
357 (ARM_FW_CONFIGS_LIMIT - ARM_BL_RAM_BASE), \
397 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
399 (ARM_BL_RAM_BASE + PAGE_SIZE) + (PAGE_SIZE / 2U))
412 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
425 #define BL1_RW_BASE (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE - \
427 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
445 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
493 #define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) - \
504 #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/include/nrd3/
H A Dnrd_plat_arm_def3.h523 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ macro
526 ARM_BL_RAM_BASE)
536 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
537 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \
553 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE)
555 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + ARM_FW_CONFIGS_SIZE)
562 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \
565 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
584 #define BL31_BASE ((ARM_BL_RAM_BASE + \
589 #define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
[all …]
/rk3399_ARM-atf/include/plat/arm/common/
H A Darm_def.h76 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + \ macro
432 #define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \
434 - ARM_BL_RAM_BASE), \
537 #define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
538 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \
553 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + ARM_FW_CONFIGS_SIZE)
574 #define BL1_RW_BASE (ARM_BL_RAM_BASE + \
578 #define BL1_RW_LIMIT (ARM_BL_RAM_BASE + \
605 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
646 #define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\
[all …]
/rk3399_ARM-atf/plat/arm/board/corstone1000/common/include/
H A Dplatform_def.h126 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE) macro
136 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
146 #define BL32_BASE ARM_BL_RAM_BASE
196 #define ARM_BL2_MEM_DESC_LIMIT ARM_BL_RAM_BASE
/rk3399_ARM-atf/plat/arm/board/fvp/fdts/
H A Dfvp_fw_config.dts11 #define TB_SOC_FW_ADDR (ARM_BL_RAM_BASE + 0x300)
12 #define TOS_FW_ADDR (ARM_BL_RAM_BASE + 0x500)
/rk3399_ARM-atf/plat/arm/common/
H A Darm_bl2_el3_setup.c42 bl2_el3_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl2_el3_early_platform_setup()
H A Darm_dyn_cfg.c193 if (image_base < ARM_BL_RAM_BASE) { in arm_bl2_dyn_cfg_init()
H A Darm_bl1_setup.c89 bl1_tzram_layout.total_base = ARM_BL_RAM_BASE; in arm_bl1_early_platform_setup()
/rk3399_ARM-atf/plat/arm/board/juno/include/
H A Dplatform_def.h190 #define PLAT_ARM_EL3_FW_HANDOFF_BASE ARM_BL_RAM_BASE
347 #define ARM_FW_CONFIG_LIMIT ((ARM_BL_RAM_BASE + PAGE_SIZE) \
/rk3399_ARM-atf/include/plat/nuvoton/npcm845x/
H A Dplatform_def.h109 #define ARM_BL_RAM_BASE (ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE) macro
/rk3399_ARM-atf/plat/arm/board/tc/include/
H A Dplatform_def.h43 #define PLAT_ARM_EL3_FW_HANDOFF_BASE ARM_BL_RAM_BASE
/rk3399_ARM-atf/plat/arm/board/fvp/include/
H A Dplatform_def.h188 #define PLAT_ARM_EL3_FW_HANDOFF_BASE ARM_BL_RAM_BASE