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Searched refs:APU_RVBAR_L_0 (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/xilinx/versal_net/include/
H A Dversal_net_def.h132 #define APU_RVBAR_L_0 U(0x40) macro
/rk3399_ARM-atf/plat/amd/versal2/include/
H A Ddef.h143 #define APU_RVBAR_L_0 U(0x40) macro
/rk3399_ARM-atf/plat/xilinx/versal_net/
H A Dplat_psci.c67 mmio_write_32(apu_cluster_base + APU_RVBAR_L_0 + (cpu << 3), in zynqmp_nopmu_pwr_domain_on()
/rk3399_ARM-atf/plat/amd/versal2/
H A Dplat_psci.c70 mmio_write_32(apu_cluster_base + APU_RVBAR_L_0 + (cpu << 3), in zynqmp_nopmu_pwr_domain_on()
/rk3399_ARM-atf/plat/xilinx/zynqmp/include/
H A Dzynqmp_def.h91 #define APU_RVBAR_L_0 (APU_BASE + 0x40) macro