| #
bc11248a |
| 26-May-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_versal_misra_fixes_series_3" into integration
* changes: fix(xilinx): resolve misra rule 16.3 violations fix(xilinx): resolve misra rule 2.5 violations fix(xilin
Merge changes from topic "xlnx_versal_misra_fixes_series_3" into integration
* changes: fix(xilinx): resolve misra rule 16.3 violations fix(xilinx): resolve misra rule 2.5 violations fix(xilinx): resolve misra rule 4.6 violations fix(xilinx): resolve misra rule 12.2 violations fix(xilinx): resolve misra rule 10.1 violations fix(xilinx): resolve misra rule 8.13 violations fix(xilinx): resolve misra rule 4.5 violations fix(xilinx): resolve misra rule 16.4 violations
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| #
2993166d |
| 09-Apr-2025 |
Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com> |
fix(xilinx): resolve misra rule 4.5 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.4.5: - Identifiers in the same name space with overlapping visibility should be ty
fix(xilinx): resolve misra rule 4.5 violations
Fixed below MISRA violation: - MISRA Violation: MISRA-C:2012 R.4.5: - Identifiers in the same name space with overlapping visibility should be typographically unambiguous. - Fix: - Renamed PM_RET_ERROR_NOFEATURE to PM_RET_ERROR_IOCTL_NOT_SUPPORTED and removed unnecessary macro definitions.
Change-Id: I6f03e619979685df7418fbccad7b0934d136776e Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>
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| #
49d02511 |
| 21-Feb-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "versal2-pm-support" into integration
* changes: feat(versal2): extended SMCCC payload for EEMI feat(versal2): add support for platform management feat(versal2): add d
Merge changes from topic "versal2-pm-support" into integration
* changes: feat(versal2): extended SMCCC payload for EEMI feat(versal2): add support for platform management feat(versal2): add dependency macro for PM
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| #
414cf08b |
| 20-Feb-2025 |
Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com> |
feat(versal2): add support for platform management
Add support for PM functionality through EEMI interface for Versal Gen 2. Add support of PM APIs in PSCI ops. Add TFA_NO_PM flag to disable PM func
feat(versal2): add support for platform management
Add support for PM functionality through EEMI interface for Versal Gen 2. Add support of PM APIs in PSCI ops. Add TFA_NO_PM flag to disable PM functionality. Enable wakeup for new peripherals
Change-Id: I1bf67dc46af91ee113c627d32ae6ecc1dad386c2 Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com> Signed-off-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@amd.com>
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| #
fffde230 |
| 23-Jan-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge changes from topic "xlnx_fix_plat_single_ret" into integration
* changes: fix(versal2): modify function to have single return fix(versal-net): modify function to have single return fix(v
Merge changes from topic "xlnx_fix_plat_single_ret" into integration
* changes: fix(versal2): modify function to have single return fix(versal-net): modify function to have single return fix(versal): modify function to have single return fix(xilinx): modify function to have single return fix(zynqmp): modify function to have single return fix(versal-net): add unsigned suffix to match data type fix(versal): add unsigned suffix to match data type fix(versal2): add missing curly braces fix(versal-net): add missing curly braces fix(zynqmp): add missing curly braces
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| #
fb2fdcd9 |
| 29-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store t
fix(versal2): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store the return value to ensure single return for the function.
Change-Id: Ib152831e84f5ead5b57fd713ebfedb1f3340a727 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
9ef62bd8 |
| 23-Dec-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_data_types" into integration
* changes: fix(versal2): typecast operands to match data type fix(versal): typecast operands to match data type fix(versal-
Merge changes from topic "xlnx_fix_plat_data_types" into integration
* changes: fix(versal2): typecast operands to match data type fix(versal): typecast operands to match data type fix(versal-net): typecast operands to match data type fix(xilinx): typecast operands to match data type fix(zynqmp): typecast operands to match data type fix(versal-net): typecast operands to match data type fix(versal): typecast operands to match data type fix(xilinx): typecast operands to match data type fix(zynqmp): typecast operands to match data type fix(versal2): typecast expressions to match data type fix(versal-net): typecast expressions to match data type fix(versal): typecast expressions to match data type fix(xilinx): typecast expressions to match data type fix(zynqmp): typecast expressions to match data type fix(zynqmp): align essential type categories fix(zynqmp): typecast expression to match data type fix(xilinx): typecast expression to match data type
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| #
07be78d5 |
| 24-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a
fix(versal2): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I37ec9f8d716347df9acea5eb084f5a423a32a058 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
fbc415d2 |
| 21-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): typecast expressions to match data type
This corrects the MISRA violation C2012-10.4: Both operands of an operator in which the usual arithmetic conversions are performed shall have th
fix(versal2): typecast expressions to match data type
This corrects the MISRA violation C2012-10.4: Both operands of an operator in which the usual arithmetic conversions are performed shall have the same essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: Ia352e3cf261b52777c1c431701e1e6c3be9cd279 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
a9fdd198 |
| 06-Nov-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration
* changes: fix(versal2): variable conflicting with external linkage fix(versal-net): variable conflicting with external l
Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration
* changes: fix(versal2): variable conflicting with external linkage fix(versal-net): variable conflicting with external linkage fix(versal): variable conflicting with external linkage fix(zynqmp): variable conflicting with external linkage fix(versal2): add external declaration fix(versal): add external declaration fix(zynqmp): add external declaration
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| #
ca39fd46 |
| 08-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): variable conflicting with external linkage
This corrects the MISRA violation C2012-5.8: Identifiers that define objects or functions with external linkage shall be unique. Modify the v
fix(versal2): variable conflicting with external linkage
This corrects the MISRA violation C2012-5.8: Identifiers that define objects or functions with external linkage shall be unique. Modify the variable name to prevent conflict with external object linkage.
Change-Id: I2448e4ad0660e654ceb40940e0046d2f2899b41b Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
6a0441bd |
| 04-Nov-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(versal2): ospi data integrity cases are failing" into integration
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| #
a1473626 |
| 29-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(versal2): ospi data integrity cases are failing
Value of linear mode is in bit 1 and not in bit 0. Updated logic to clear and set bit 1 for linear mode.
Change-Id: Ia39b2a1b2e35f02edd36e043045b
fix(versal2): ospi data integrity cases are failing
Value of linear mode is in bit 1 and not in bit 0. Updated logic to clear and set bit 1 for linear mode.
Change-Id: Ia39b2a1b2e35f02edd36e043045b568d231745ba Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
75fdb32f |
| 09-Sep-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(versal2): implement USB_SET_STATE dummy IOCTL" into integration
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| #
282bce19 |
| 05-Sep-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
feat(versal2): implement USB_SET_STATE dummy IOCTL
USB DWC3 driver calls firmware API to set USB D0/D3 power states. In absence of firmware driver probe these PM APIs return -ENODEV and DWC3 driver
feat(versal2): implement USB_SET_STATE dummy IOCTL
USB DWC3 driver calls firmware API to set USB D0/D3 power states. In absence of firmware driver probe these PM APIs return -ENODEV and DWC3 driver probe fails. Till PLM implement these PM APIs as a temporary workaround add dummy PM implementation in TFA.
Change-Id: I8768301524ffdc2f275221296feaa2a3ad0ad4f6 Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| #
a71f11ba |
| 12-Aug-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge "fix(versal2): add ufs specific features support" into integration
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| #
b9c20e5d |
| 29-Jul-2024 |
Amit Nagal <amit.nagal@amd.com> |
fix(versal2): add ufs specific features support
Following IOCTL IDs are required for UFS specific functionalities.
IOCTL ID - 40(IOCTL_UFS_TXRX_CFGRDY_GET) This gives the Tx_Rx_config_rdy_signal_mo
fix(versal2): add ufs specific features support
Following IOCTL IDs are required for UFS specific functionalities.
IOCTL ID - 40(IOCTL_UFS_TXRX_CFGRDY_GET) This gives the Tx_Rx_config_rdy_signal_mon(0xF1061054) register value which contains the Tx and Rx lanes configuration ready signal information.
IOCTL ID - 41(IOCTL_UFS_SRAM_CSR_SEL) Select - 0(IOCTL_UFS_SRAM_CSR_SET) This will allow to set sram control and status register (0xF106104C) with the value provided by driver.
Select - 1(IOCTL_UFS_SRAM_CSR_GET) This should return the sram control and status register (0xF106104C) value to the driver.
UFS Host reset assert/de-assert(using SCMI) support is added. register address : 0xF1260340
UFS PHY reset assert/de-assert(using SCMI) support is added. register address : 0xF1061050
Change-Id: I5368cc7251350946bd5ddb3a4c817b75e1d4a43e Signed-off-by: Amit Nagal <amit.nagal@amd.com>
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| #
6f05b8d4 |
| 18-Jun-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(versal2): add support for AMD Versal Gen 2 platform" into integration
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| #
c97857db |
| 05-Jun-2024 |
Amit Nagal <amit.nagal@amd.com> |
feat(versal2): add support for AMD Versal Gen 2 platform
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM
feat(versal2): add support for AMD Versal Gen 2 platform
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM firmware which loads TF-A(bl31) to memory, which is already configured, and jumps to it. PLM also prepare handoff structure for TF-A with information what components were load and flags which indicate which EL level SW should be started.
Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c Signed-off-by: Amit Nagal <amit.nagal@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
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