Merge "fix(versal2): align comment about invalid console selection" into integration

fix(versal2): align comment about invalid console selection

Error message should be aligned actual symbol used for console section
which has been changed by commit 2333ab4cd214 ("fix(versal2): renam

fix(versal2): align comment about invalid console selection

Error message should be aligned actual symbol used for console section
which has been changed by commit 2333ab4cd214 ("fix(versal2): rename
console build arg to generic").

Change-Id: I230892875a6343ca8ffc55e0fac251f6586cf3f4
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "xlnx_versal2_cpuidle_fix" into integration

* changes:
fix(versal2): fix offsets for apu pcil
fix(versal2): initialize counter-timer frequency register
fix(versal2): u

Merge changes from topic "xlnx_versal2_cpuidle_fix" into integration

* changes:
fix(versal2): fix offsets for apu pcil
fix(versal2): initialize counter-timer frequency register
fix(versal2): use common function to get system counter frequency
fix(versal2): align IOU_SCNTR base address macro name with other platforms

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fix(versal2): align IOU_SCNTR base address macro name with other platforms

Renamed the IOU_SCNTR base address macro to match the naming
convention used in Versal and Versal NET. This ensures
consist

fix(versal2): align IOU_SCNTR base address macro name with other platforms

Renamed the IOU_SCNTR base address macro to match the naming
convention used in Versal and Versal NET. This ensures
consistency across platforms and enables the use of a common
function for getting and setting the system counter-timer
frequency.

Change-Id: I257a1086d77350858d63859b0fbe6e2b47deb9e5
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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Merge "fix(versal2): rename console build arg to generic" into integration

fix(versal2): rename console build arg to generic

Rename VERSAL2_CONSOLE build argument to CONSOLE to
keep it aligned with generic build arguments.

Change-Id: I0f4967aa262f0300d8f76f6638030a1839901

fix(versal2): rename console build arg to generic

Rename VERSAL2_CONSOLE build argument to CONSOLE to
keep it aligned with generic build arguments.

Change-Id: I0f4967aa262f0300d8f76f6638030a1839901234
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge "feat(versal2): update platform version to versal2" into integration

feat(versal2): update platform version to versal2

Extend board detection with saving information about PS,
PMC and RTL versions. Variables can be use to cover
different behavior based on version and

feat(versal2): update platform version to versal2

Extend board detection with saving information about PS,
PMC and RTL versions. Variables can be use to cover
different behavior based on version and version
information is also printed for chip identification.

Change-Id: Ia37418f6a31426a5763fb89fc76fef91d09df155
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-

Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal2): typecast expressions to match data type
fix(versal-net): typecast expressions to match data type
fix(versal): typecast expressions to match data type
fix(xilinx): typecast expressions to match data type
fix(zynqmp): typecast expressions to match data type
fix(zynqmp): align essential type categories
fix(zynqmp): typecast expression to match data type
fix(xilinx): typecast expression to match data type

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fix(versal2): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have th

fix(versal2): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential type
category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: Ia352e3cf261b52777c1c431701e1e6c3be9cd279
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console t

Merge changes from topic "xlnx_fix_plat_console_changes" into integration

* changes:
feat(xilinx): add none console
feat(versal2): add dtb & runtime console
feat(versal-net): add DTB console to platform.mk
feat(versal-net): dedicate console for boot and runtime
feat(versal): add DTB console to platform.mk
feat(versal): dedicate console for boot and runtime
refactor(xilinx): register runtime console directly
refactor(xilinx): console registration through console holder structure
feat(zynqmp): add DTB console to platform.mk
feat(zynqmp): dedicate console for boot and runtime
fix(xilinx): dcc to support runtime console scope
refactor(xilinx): create generic function for DT console
refactor(xilinx): rename setup_runtime_console to generic
chore(xilinx): rename console variables
chore(xilinx): rename runtime console to DT console

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feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: M

feat(xilinx): add none console

None console does not register boot and runtime console.
User will not observe any console logs.

Change-Id: I39877c900f399ae7cffc1bb599b30c7a23888fc8
Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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feat(versal2): add dtb & runtime console

Modified platform.mk and bl31_setup to
invoke setup_console and runtime_console
to support dtb console parsing and runtime.

Change-Id: I68c2fffd90e38274cfa

feat(versal2): add dtb & runtime console

Modified platform.mk and bl31_setup to
invoke setup_console and runtime_console
to support dtb console parsing and runtime.

Change-Id: I68c2fffd90e38274cfad4f85dd51c722fae0ee89
Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>

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Merge "fix(versal2): add ufs specific features support" into integration

fix(versal2): add ufs specific features support

Following IOCTL IDs are required for UFS specific functionalities.

IOCTL ID - 40(IOCTL_UFS_TXRX_CFGRDY_GET)
This gives the Tx_Rx_config_rdy_signal_mo

fix(versal2): add ufs specific features support

Following IOCTL IDs are required for UFS specific functionalities.

IOCTL ID - 40(IOCTL_UFS_TXRX_CFGRDY_GET)
This gives the Tx_Rx_config_rdy_signal_mon(0xF1061054) register value
which contains the Tx and Rx lanes configuration ready signal information.

IOCTL ID - 41(IOCTL_UFS_SRAM_CSR_SEL)
Select - 0(IOCTL_UFS_SRAM_CSR_SET)
This will allow to set sram control and status register (0xF106104C)
with the value provided by driver.

Select - 1(IOCTL_UFS_SRAM_CSR_GET)
This should return the sram control and status register (0xF106104C) value
to the driver.

UFS Host reset assert/de-assert(using SCMI) support is added.
register address : 0xF1260340

UFS PHY reset assert/de-assert(using SCMI) support is added.
register address : 0xF1061050

Change-Id: I5368cc7251350946bd5ddb3a4c817b75e1d4a43e
Signed-off-by: Amit Nagal <amit.nagal@amd.com>

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Merge "feat(versal2): add support for AMD Versal Gen 2 platform" into integration

feat(versal2): add support for AMD Versal Gen 2 platform

New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal NET platform. System starts with AMD PLM

feat(versal2): add support for AMD Versal Gen 2 platform

New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal NET platform. System starts with AMD PLM
firmware which loads TF-A(bl31) to memory, which is already configured, and
jumps to it. PLM also prepare handoff structure for TF-A with information
what components were load and flags which indicate which EL level SW should
be started.

Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c
Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>

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