Home
last modified time | relevance | path

Searched refs:reg_value (Results 1 – 25 of 200) sorted by relevance

12345678

/OK3568_Linux_fs/u-boot/drivers/ram/rockchip/
H A Dsdram_rk3399.c208 u32 reg_value; in phy_io_config() local
295 reg_value = (vref_mode_dq << 9) | (0x1 << 8) | vref_value_dq; in phy_io_config()
297 clrsetbits_le32(&denali_phy[913], 0xfff << 8, reg_value << 8); in phy_io_config()
299 clrsetbits_le32(&denali_phy[914], 0xfff, reg_value); in phy_io_config()
301 clrsetbits_le32(&denali_phy[914], 0xfff << 16, reg_value << 16); in phy_io_config()
303 clrsetbits_le32(&denali_phy[915], 0xfff, reg_value); in phy_io_config()
305 reg_value = (vref_mode_ac << 9) | (0x1 << 8) | vref_value_ac; in phy_io_config()
307 clrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16); in phy_io_config()
330 reg_value = ((boostp << 4) | boostn); in phy_io_config()
332 clrsetbits_le32(&denali_phy[925], 0xff << 8, reg_value << 8); in phy_io_config()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dfreeze_controller.c31 u32 reg_value; in sys_mgr_frzctrl_freeze_req() local
83 reg_value = readl(&freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()
87 reg_value in sys_mgr_frzctrl_freeze_req()
88 = (reg_value & ~reg_cfg_mask) in sys_mgr_frzctrl_freeze_req()
91 writel(reg_value, &freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()
97 reg_value = readl(&freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()
98 reg_value in sys_mgr_frzctrl_freeze_req()
99 = (reg_value & in sys_mgr_frzctrl_freeze_req()
102 writel(reg_value, &freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()
113 u32 reg_value; in sys_mgr_frzctrl_thaw_req() local
[all …]
/OK3568_Linux_fs/kernel/drivers/media/spi/
H A Dgs1662.c54 u16 reg_value; member
59 u16 reg_value; member
235 if (reg_fmt[i].reg_value == std) { in gs_status_format()
251 return reg_fmt[i].reg_value | MASK_FORCE_STD; in get_register_timings()
266 int reg_value; in gs_s_dv_timings() local
268 reg_value = get_register_timings(timings); in gs_s_dv_timings()
269 if (reg_value == 0x0) in gs_s_dv_timings()
290 u16 reg_value, i; in gs_query_dv_timings() local
301 gs_read_register(gs->pdev, REG_LINES_PER_FRAME + i, &reg_value); in gs_query_dv_timings()
302 if (reg_value) in gs_query_dv_timings()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/
H A Ddm_services.h107 uint32_t reg_value, in get_reg_field_value_ex() argument
111 return (mask & reg_value) >> shift; in get_reg_field_value_ex()
114 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
116 (reg_value),\
121 uint32_t reg_value, in set_reg_field_value_ex() argument
127 return (reg_value & ~mask) | (mask & (value << shift)); in set_reg_field_value_ex()
130 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
131 (reg_value) = set_reg_field_value_ex(\
132 (reg_value),\
183 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
[all …]
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/cxd2880/
H A Dcxd2880_tnrdmd_dvbt_mon.c392 u16 *reg_value) in dvbt_read_snr_reg() argument
397 if (!tnr_dmd || !reg_value) in dvbt_read_snr_reg()
428 *reg_value = (rdata[0] << 8) | rdata[1]; in dvbt_read_snr_reg()
434 u32 reg_value, int *snr) in dvbt_calc_snr() argument
439 if (reg_value == 0) in dvbt_calc_snr()
442 if (reg_value > 4996) in dvbt_calc_snr()
443 reg_value = 4996; in dvbt_calc_snr()
445 *snr = intlog10(reg_value) - intlog10(5350 - reg_value); in dvbt_calc_snr()
454 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt_mon_snr() local
472 ret = dvbt_read_snr_reg(tnr_dmd, &reg_value); in cxd2880_tnrdmd_dvbt_mon_snr()
[all …]
H A Dcxd2880_tnrdmd_dvbt2_mon.c1228 u16 *reg_value) in dvbt2_read_snr_reg() argument
1236 if (!tnr_dmd || !reg_value) in dvbt2_read_snr_reg()
1275 *reg_value = (data[0] << 8) | data[1]; in dvbt2_read_snr_reg()
1281 u32 reg_value, int *snr) in dvbt2_calc_snr() argument
1286 if (reg_value == 0) in dvbt2_calc_snr()
1289 if (reg_value > 10876) in dvbt2_calc_snr()
1290 reg_value = 10876; in dvbt2_calc_snr()
1292 *snr = intlog10(reg_value) - intlog10(12600 - reg_value); in dvbt2_calc_snr()
1301 u16 reg_value = 0; in cxd2880_tnrdmd_dvbt2_mon_snr() local
1319 ret = dvbt2_read_snr_reg(tnr_dmd, &reg_value); in cxd2880_tnrdmd_dvbt2_mon_snr()
[all …]
H A Dcxd2880_io.c49 const struct cxd2880_reg_value reg_value[], in cxd2880_io_write_multi_regs() argument
59 ret = io->write_reg(io, tgt, reg_value[i].addr, in cxd2880_io_write_multi_regs()
60 reg_value[i].value); in cxd2880_io_write_multi_regs()
/OK3568_Linux_fs/kernel/drivers/input/touchscreen/focaltech_touch_ft5436/
H A Dfocaltech_esdcheck.c139 u8 reg_value = 0; in get_chip_id() local
145 ret = fts_read(&reg_addr, 1, &reg_value, 1); in get_chip_id()
150 if (reg_value == chip_id) { in get_chip_id()
153 FTS_DEBUG("read chip_id:%x,retry:%d", reg_value, i); in get_chip_id()
180 u8 reg_value = 0; in get_flow_cnt() local
184 ret = fts_read(&reg_addr, 1, &reg_value, 1); in get_flow_cnt()
189 if ( reg_value == fts_esdcheck_data.flow_work_cnt_last ) { in get_flow_cnt()
190 FTS_DEBUG("reg0x91,val:%x,last:%x", reg_value, in get_flow_cnt()
197 fts_esdcheck_data.flow_work_cnt_last = reg_value; in get_flow_cnt()
212 u8 reg_value = 0; in esdcheck_algorithm() local
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-max9485.c36 u8 reg_value; member
80 u8 reg_value; member
96 drvdata->reg_value &= ~mask; in max9485_update_bits()
97 drvdata->reg_value |= value; in max9485_update_bits()
101 mask, value, drvdata->reg_value); in max9485_update_bits()
104 &drvdata->reg_value, in max9485_update_bits()
105 sizeof(drvdata->reg_value)); in max9485_update_bits()
144 entry->reg_value); in max9485_clkout_set_rate()
152 u8 val = drvdata->reg_value & MAX9485_FREQ_MASK; in max9485_clkout_recalc_rate()
156 if (val == entry->reg_value) in max9485_clkout_recalc_rate()
[all …]
/OK3568_Linux_fs/kernel/drivers/input/touchscreen/focaltech_touch/
H A Dfocaltech_esdcheck.c158 u8 reg_value = 0; in get_chip_id() local
165 ret = fts_i2c_read(client, &reg_addr, 1, &reg_value, 1); in get_chip_id()
170 if (reg_value == chip_id) { in get_chip_id()
199 u8 reg_value = 0; in get_flow_cnt() local
204 ret = fts_i2c_read(client, &reg_addr, 1, &reg_value, 1); in get_flow_cnt()
209 if ( reg_value == fts_esdcheck_data.flow_work_cnt_last ) { in get_flow_cnt()
215 fts_esdcheck_data.flow_work_cnt_last = reg_value; in get_flow_cnt()
237 u8 reg_value = 0; in esdcheck_algorithm() local
265 ret = fts_i2c_read(client, &reg_addr, 1, &reg_value, 1); in esdcheck_algorithm()
268 } else if ( (reg_value & 0x70) != FTS_REG_WORKMODE_WORK_VALUE) { in esdcheck_algorithm()
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dstv6111.c41 u16 reg_value; member
542 int table_size, u16 reg_value) in table_lookup() argument
551 if (reg_value <= table[0].reg_value) { in table_lookup()
553 } else if (reg_value >= table[imax].reg_value) { in table_lookup()
558 if ((table[imin].reg_value <= reg_value) && in table_lookup()
559 (reg_value <= table[i].reg_value)) in table_lookup()
564 reg_diff = table[imax].reg_value - table[imin].reg_value; in table_lookup()
567 gain += ((s32)(reg_value - table[imin].reg_value) * in table_lookup()
/OK3568_Linux_fs/u-boot/drivers/net/phy/
H A Dcortina.c213 fw_temp.reg_value = (simple_strtoul(reg_data, NULL, 0)) & in cs4340_upload_firmware()
215 phy_write(phydev, 0x00, fw_temp.reg_addr, fw_temp.reg_value); in cs4340_upload_firmware()
222 int reg_value; in cs4340_phy_init() local
229 reg_value = phy_read(phydev, 0x00, VILLA_GLOBAL_BIST_STATUS); in cs4340_phy_init()
230 if (reg_value & mseq_edc_bist_done) { in cs4340_phy_init()
231 if (0 == (reg_value & mseq_edc_bist_fail)) in cs4340_phy_init()
244 reg_value = phy_read(phydev, 0x00, VILLA_GLOBAL_DWNLD_CHECKSUM_STATUS); in cs4340_phy_init()
245 if (reg_value) { in cs4340_phy_init()
/OK3568_Linux_fs/kernel/drivers/hwtracing/coresight/
H A Dcoresight-cti-core.c337 u32 reg_value; in cti_channel_trig_op() local
368 reg_value = direction == CTI_TRIG_IN ? config->ctiinen[trigger_idx] : in cti_channel_trig_op()
371 reg_value |= chan_bitmask; in cti_channel_trig_op()
373 reg_value &= ~chan_bitmask; in cti_channel_trig_op()
377 config->ctiinen[trigger_idx] = reg_value; in cti_channel_trig_op()
379 config->ctiouten[trigger_idx] = reg_value; in cti_channel_trig_op()
383 cti_write_single_reg(drvdata, reg_offset, reg_value); in cti_channel_trig_op()
394 u32 reg_value; in cti_channel_gate_op() local
403 reg_value = config->ctigate; in cti_channel_gate_op()
406 reg_value |= chan_bitmask; in cti_channel_gate_op()
[all …]
/OK3568_Linux_fs/kernel/drivers/power/supply/
H A Dab8500_fg.c1823 u8 reg_value; in ab8500_fg_check_hw_failure_work() local
1834 &reg_value); in ab8500_fg_check_hw_failure_work()
1839 if ((reg_value & BATT_OVV) == BATT_OVV) { in ab8500_fg_check_hw_failure_work()
2557 u8 reg_value; in ab8505_powercut_flagtime_read() local
2562 AB8505_RTC_PCUT_FLAG_TIME_REG, &reg_value); in ab8505_powercut_flagtime_read()
2569 return scnprintf(buf, PAGE_SIZE, "%d\n", (reg_value & 0x7F)); in ab8505_powercut_flagtime_read()
2580 int reg_value; in ab8505_powercut_flagtime_write() local
2584 if (kstrtoint(buf, 10, &reg_value)) in ab8505_powercut_flagtime_write()
2587 if (reg_value > 0x7F) { in ab8505_powercut_flagtime_write()
2593 AB8505_RTC_PCUT_FLAG_TIME_REG, (u8)reg_value); in ab8505_powercut_flagtime_write()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/
H A Dphydm_api.c412 u32 reg_value = 0; in phydm_csi_mask_enable() local
414 reg_value = (enable == FUNC_ENABLE) ? 1 : 0; in phydm_csi_mask_enable()
418 odm_set_bb_reg(p_dm, 0xD2C, BIT(28), reg_value); in phydm_csi_mask_enable()
419 PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable CSI Mask: Reg 0xD2C[28] = ((0x%x))\n", reg_value)); in phydm_csi_mask_enable()
423 odm_set_bb_reg(p_dm, 0x874, BIT(0), reg_value); in phydm_csi_mask_enable()
424 PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable CSI Mask: Reg 0x874[0] = ((0x%x))\n", reg_value)); in phydm_csi_mask_enable()
596 u32 reg_value = 0; in phydm_nbi_enable() local
598 reg_value = (enable == FUNC_ENABLE) ? 1 : 0; in phydm_nbi_enable()
602 odm_set_bb_reg(p_dm, 0xc40, BIT(9), reg_value); in phydm_nbi_enable()
603 PHYDM_DBG(p_dm, ODM_COMP_API, ("Enable NBI Reg0xC40[9] = ((0x%x))\n", reg_value)); in phydm_nbi_enable()
[all …]
/OK3568_Linux_fs/kernel/drivers/ata/
H A Dahci_imx.c818 struct reg_value { struct
820 u32 reg_value; argument
825 const struct reg_value *values;
831 static const struct reg_value gpr13_tx_level[] = {
866 static const struct reg_value gpr13_tx_boost[] = {
885 static const struct reg_value gpr13_tx_atten[] = {
894 static const struct reg_value gpr13_rx_eq[] = {
937 u32 reg_value = 0; in imx_ahci_parse_props() local
945 reg_value |= prop->set_value; in imx_ahci_parse_props()
947 reg_value |= prop->def_value; in imx_ahci_parse_props()
[all …]
/OK3568_Linux_fs/kernel/drivers/misc/
H A Dxilinx_sdfec.c263 u32 reg_value; in update_config_from_hw() local
267 reg_value = xsdfec_regread(xsdfec, XSDFEC_ORDER_ADDR); in update_config_from_hw()
268 xsdfec->config.order = reg_value; in update_config_from_hw()
278 reg_value = xsdfec_regread(xsdfec, XSDFEC_IMR_ADDR); in update_config_from_hw()
279 xsdfec->config.irq.enable_isr = (reg_value & XSDFEC_ISR_MASK) > 0; in update_config_from_hw()
281 reg_value = xsdfec_regread(xsdfec, XSDFEC_ECC_IMR_ADDR); in update_config_from_hw()
283 (reg_value & XSDFEC_ECC_ISR_MASK) > 0; in update_config_from_hw()
285 reg_value = xsdfec_regread(xsdfec, XSDFEC_AXIS_ENABLE_ADDR); in update_config_from_hw()
286 sdfec_started = (reg_value & XSDFEC_AXIS_IN_ENABLE_MASK) > 0; in update_config_from_hw()
437 u32 reg_value; in xsdfec_get_turbo() local
[all …]
/OK3568_Linux_fs/kernel/drivers/input/sensors/accel/
H A Dda223_core.c107 unsigned char reg_value; member
540 &&(gsensor_chip_info.reg_value != 0x4B) in mir3da_read_data()
541 &&(gsensor_chip_info.reg_value != 0x8C) in mir3da_read_data()
542 &&(gsensor_chip_info.reg_value != 0xCA)) in mir3da_read_data()
596 if((gsensor_chip_info.reg_value == 0x4B) in mir3da_read_data()
597 ||(gsensor_chip_info.reg_value == 0x8C) in mir3da_read_data()
598 ||(gsensor_chip_info.reg_value == 0xCA) in mir3da_read_data()
1175 ||(gsensor_chip_info.reg_value == 0x4B) in mir3da_auto_calibrate()
1176 ||(gsensor_chip_info.reg_value == 0x8C) in mir3da_auto_calibrate()
1177 ||(gsensor_chip_info.reg_value == 0xCA) in mir3da_auto_calibrate()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/allwinner/
H A Dphy-sun9i-usb.c46 u32 bits, reg_value; in sun9i_usb_phy_passby() local
56 reg_value = readl(phy->pmu); in sun9i_usb_phy_passby()
59 reg_value |= bits; in sun9i_usb_phy_passby()
61 reg_value &= ~bits; in sun9i_usb_phy_passby()
63 writel(reg_value, phy->pmu); in sun9i_usb_phy_passby()
/OK3568_Linux_fs/kernel/arch/powerpc/platforms/cell/
H A Dcbe_thermal.c57 static inline u8 reg_to_temp(u8 reg_value) in reg_to_temp() argument
59 return ((reg_value & 0x3f) << 1) + TEMP_MIN; in reg_to_temp()
115 u64 reg_value; in store_throttle() local
127 reg_value = in_be64(&pmd_regs->tm_tpr.val); in store_throttle()
130 reg_value &= ~(0xffull << pos); in store_throttle()
132 reg_value |= new_value << pos; in store_throttle()
134 out_be64(&pmd_regs->tm_tpr.val, reg_value); in store_throttle()
/OK3568_Linux_fs/kernel/drivers/video/fbdev/via/
H A Dhw.c1014 int reg_value; in viafb_load_fetch_count_reg() local
1020 reg_value = IGA1_FETCH_COUNT_FORMULA(h_addr, bpp_byte); in viafb_load_fetch_count_reg()
1024 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_fetch_count_reg()
1027 reg_value = IGA2_FETCH_COUNT_FORMULA(h_addr, bpp_byte); in viafb_load_fetch_count_reg()
1031 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIACR); in viafb_load_fetch_count_reg()
1039 int reg_value; in viafb_load_FIFO_reg() local
1159 reg_value = IGA1_FIFO_DEPTH_SELECT_FORMULA(iga1_fifo_max_depth); in viafb_load_FIFO_reg()
1163 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
1166 reg_value = IGA1_FIFO_THRESHOLD_FORMULA(iga1_fifo_threshold); in viafb_load_FIFO_reg()
1173 viafb_load_reg(reg_value, viafb_load_reg_num, reg, VIASR); in viafb_load_FIFO_reg()
[all …]
/OK3568_Linux_fs/kernel/arch/mips/include/asm/sn/sn0/
H A Dhubio.h203 u64 reg_value; member
445 u64 reg_value; member
467 u64 reg_value; member
514 u64 reg_value; member
556 u64 reg_value; member
672 u64 reg_value; member
709 u64 reg_value; member
824 u64 reg_value; member
839 #define iprb_regval reg_value
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_hwtstamp.c28 u32 reg_value; in config_sub_second_increment() local
49 reg_value = data; in config_sub_second_increment()
51 reg_value <<= GMAC4_PTP_SSIR_SSINC_SHIFT; in config_sub_second_increment()
53 writel(reg_value, ioaddr + PTP_SSIR); in config_sub_second_increment()
/OK3568_Linux_fs/kernel/sound/pci/echoaudio/
H A Dechoaudio_gml.c66 __le32 reg_value; in write_control_reg() local
77 reg_value = cpu_to_le32(value); in write_control_reg()
78 if (reg_value != chip->comm_page->control_register || force) { in write_control_reg()
81 chip->comm_page->control_register = reg_value; in write_control_reg()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/microchip/
H A Dlan743x_ethtool.c24 u32 reg_value; in lan743x_otp_power_up() local
26 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN); in lan743x_otp_power_up()
28 if (reg_value & OTP_PWR_DN_PWRDN_N_) { in lan743x_otp_power_up()
30 reg_value &= ~OTP_PWR_DN_PWRDN_N_; in lan743x_otp_power_up()
31 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value); in lan743x_otp_power_up()
41 u32 reg_value; in lan743x_otp_power_down() local
43 reg_value = lan743x_csr_read(adapter, OTP_PWR_DN); in lan743x_otp_power_down()
44 if (!(reg_value & OTP_PWR_DN_PWRDN_N_)) { in lan743x_otp_power_down()
46 reg_value |= OTP_PWR_DN_PWRDN_N_; in lan743x_otp_power_down()
47 lan743x_csr_write(adapter, OTP_PWR_DN, reg_value); in lan743x_otp_power_down()

12345678