Lines Matching refs:reg_value
208 u32 reg_value; in phy_io_config() local
295 reg_value = (vref_mode_dq << 9) | (0x1 << 8) | vref_value_dq; in phy_io_config()
297 clrsetbits_le32(&denali_phy[913], 0xfff << 8, reg_value << 8); in phy_io_config()
299 clrsetbits_le32(&denali_phy[914], 0xfff, reg_value); in phy_io_config()
301 clrsetbits_le32(&denali_phy[914], 0xfff << 16, reg_value << 16); in phy_io_config()
303 clrsetbits_le32(&denali_phy[915], 0xfff, reg_value); in phy_io_config()
305 reg_value = (vref_mode_ac << 9) | (0x1 << 8) | vref_value_ac; in phy_io_config()
307 clrsetbits_le32(&denali_phy[915], 0xfff << 16, reg_value << 16); in phy_io_config()
330 reg_value = ((boostp << 4) | boostn); in phy_io_config()
332 clrsetbits_le32(&denali_phy[925], 0xff << 8, reg_value << 8); in phy_io_config()
334 clrsetbits_le32(&denali_phy[926], 0xff << 12, reg_value << 12); in phy_io_config()
336 clrsetbits_le32(&denali_phy[927], 0xff << 14, reg_value << 14); in phy_io_config()
338 clrsetbits_le32(&denali_phy[928], 0xff << 20, reg_value << 20); in phy_io_config()
340 clrsetbits_le32(&denali_phy[929], 0xff << 22, reg_value << 22); in phy_io_config()
342 clrsetbits_le32(&denali_phy[935], 0xff << 20, reg_value << 20); in phy_io_config()
344 clrsetbits_le32(&denali_phy[937], 0xff << 20, reg_value << 20); in phy_io_config()
346 clrsetbits_le32(&denali_phy[939], 0xff << 20, reg_value << 20); in phy_io_config()
353 reg_value = ((slewp << 3) | slewn); in phy_io_config()
355 clrsetbits_le32(&denali_phy[924], 0x3f << 8, reg_value << 8); in phy_io_config()
357 clrsetbits_le32(&denali_phy[926], 0x3f, reg_value); in phy_io_config()
359 clrsetbits_le32(&denali_phy[927], 0x3f, reg_value); in phy_io_config()
361 clrsetbits_le32(&denali_phy[928], 0x3f << 8, reg_value << 8); in phy_io_config()
363 clrsetbits_le32(&denali_phy[929], 0x3f << 8, reg_value << 8); in phy_io_config()
365 clrsetbits_le32(&denali_phy[935], 0x3f << 8, reg_value << 8); in phy_io_config()
367 clrsetbits_le32(&denali_phy[937], 0x3f << 8, reg_value << 8); in phy_io_config()
369 clrsetbits_le32(&denali_phy[939], 0x3f << 8, reg_value << 8); in phy_io_config()
548 u32 reg_value; in set_ds_odt() local
673 reg_value = tsel_rd_select_n | (tsel_rd_select_p << 0x4) | in set_ds_odt()
676 clrsetbits_le32(&denali_phy[6], 0xffffff, reg_value); in set_ds_odt()
677 clrsetbits_le32(&denali_phy[134], 0xffffff, reg_value); in set_ds_odt()
678 clrsetbits_le32(&denali_phy[262], 0xffffff, reg_value); in set_ds_odt()
679 clrsetbits_le32(&denali_phy[390], 0xffffff, reg_value); in set_ds_odt()
686 clrsetbits_le32(&denali_phy[7], 0xffffff, reg_value); in set_ds_odt()
687 clrsetbits_le32(&denali_phy[135], 0xffffff, reg_value); in set_ds_odt()
688 clrsetbits_le32(&denali_phy[263], 0xffffff, reg_value); in set_ds_odt()
689 clrsetbits_le32(&denali_phy[391], 0xffffff, reg_value); in set_ds_odt()
692 reg_value = tsel_wr_select_ca_n | (tsel_wr_select_ca_p << 0x4); in set_ds_odt()
697 writel((0x300 << 8) | reg_value, &denali_phy[544]); in set_ds_odt()
698 writel((0x300 << 8) | reg_value, &denali_phy[672]); in set_ds_odt()
699 writel((0x300 << 8) | reg_value, &denali_phy[800]); in set_ds_odt()
701 clrsetbits_le32(&denali_phy[544], 0xff, reg_value); in set_ds_odt()
702 clrsetbits_le32(&denali_phy[672], 0xff, reg_value); in set_ds_odt()
703 clrsetbits_le32(&denali_phy[800], 0xff, reg_value); in set_ds_odt()
707 clrsetbits_le32(&denali_phy[928], 0xff, reg_value); in set_ds_odt()
711 clrsetbits_le32(&denali_phy[937], 0xff, reg_value); in set_ds_odt()
714 clrsetbits_le32(&denali_phy[935], 0xff, reg_value); in set_ds_odt()
731 reg_value = (tsel_rd_en | (tsel_wr_en << 1) | (tsel_idle_en << 2)) in set_ds_odt()
733 clrsetbits_le32(&denali_phy[5], 0x7 << 16, reg_value); in set_ds_odt()
734 clrsetbits_le32(&denali_phy[133], 0x7 << 16, reg_value); in set_ds_odt()
735 clrsetbits_le32(&denali_phy[261], 0x7 << 16, reg_value); in set_ds_odt()
736 clrsetbits_le32(&denali_phy[389], 0x7 << 16, reg_value); in set_ds_odt()
739 reg_value = (tsel_rd_en | (tsel_wr_en << 1) | (tsel_idle_en << 2)) in set_ds_odt()
741 clrsetbits_le32(&denali_phy[6], 0x7 << 24, reg_value); in set_ds_odt()
742 clrsetbits_le32(&denali_phy[134], 0x7 << 24, reg_value); in set_ds_odt()
743 clrsetbits_le32(&denali_phy[262], 0x7 << 24, reg_value); in set_ds_odt()
744 clrsetbits_le32(&denali_phy[390], 0x7 << 24, reg_value); in set_ds_odt()
747 reg_value = tsel_wr_en << 8; in set_ds_odt()
748 clrsetbits_le32(&denali_phy[518], 0x1 << 8, reg_value); in set_ds_odt()
749 clrsetbits_le32(&denali_phy[646], 0x1 << 8, reg_value); in set_ds_odt()
750 clrsetbits_le32(&denali_phy[774], 0x1 << 8, reg_value); in set_ds_odt()
753 reg_value = tsel_wr_en << 17; in set_ds_odt()
754 clrsetbits_le32(&denali_phy[933], 0x1 << 17, reg_value); in set_ds_odt()
759 clrsetbits_le32(&denali_phy[938], 0x1 << 17, reg_value); in set_ds_odt()
760 clrsetbits_le32(&denali_phy[936], 0x1 << 17, reg_value); in set_ds_odt()
761 clrsetbits_le32(&denali_phy[940], 0x1 << 17, reg_value); in set_ds_odt()
762 clrsetbits_le32(&denali_phy[934], 0x1 << 17, reg_value); in set_ds_odt()
765 clrsetbits_le32(&denali_phy[930], 0x1 << 17, reg_value); in set_ds_odt()
900 u32 reg_value; in set_lp4_dq_odt() local
912 reg_value = io->dq_odt; in set_lp4_dq_odt()
914 reg_value = 0; in set_lp4_dq_odt()
918 clrsetbits_le32(&denali_ctl[139], 0x7 << 24, reg_value << 24); in set_lp4_dq_odt()
919 clrsetbits_le32(&denali_ctl[153], 0x7 << 24, reg_value << 24); in set_lp4_dq_odt()
921 clrsetbits_le32(&denali_pi[132], 0x7 << 0, (reg_value << 0)); in set_lp4_dq_odt()
922 clrsetbits_le32(&denali_pi[139], 0x7 << 16, (reg_value << 16)); in set_lp4_dq_odt()
923 clrsetbits_le32(&denali_pi[147], 0x7 << 0, (reg_value << 0)); in set_lp4_dq_odt()
924 clrsetbits_le32(&denali_pi[154], 0x7 << 16, (reg_value << 16)); in set_lp4_dq_odt()
927 clrsetbits_le32(&denali_ctl[140], 0x7 << 0, reg_value << 0); in set_lp4_dq_odt()
928 clrsetbits_le32(&denali_ctl[154], 0x7 << 0, reg_value << 0); in set_lp4_dq_odt()
930 clrsetbits_le32(&denali_pi[129], 0x7 << 16, (reg_value << 16)); in set_lp4_dq_odt()
931 clrsetbits_le32(&denali_pi[137], 0x7 << 0, (reg_value << 0)); in set_lp4_dq_odt()
932 clrsetbits_le32(&denali_pi[144], 0x7 << 16, (reg_value << 16)); in set_lp4_dq_odt()
933 clrsetbits_le32(&denali_pi[152], 0x7 << 0, (reg_value << 0)); in set_lp4_dq_odt()
937 clrsetbits_le32(&denali_ctl[140], 0x7 << 8, (reg_value << 8)); in set_lp4_dq_odt()
938 clrsetbits_le32(&denali_ctl[154], 0x7 << 8, (reg_value << 8)); in set_lp4_dq_odt()
940 clrsetbits_le32(&denali_pi[127], 0x7 << 0, (reg_value << 0)); in set_lp4_dq_odt()
941 clrsetbits_le32(&denali_pi[134], 0x7 << 16, (reg_value << 16)); in set_lp4_dq_odt()
942 clrsetbits_le32(&denali_pi[142], 0x7 << 0, (reg_value << 0)); in set_lp4_dq_odt()
943 clrsetbits_le32(&denali_pi[149], 0x7 << 16, (reg_value << 16)); in set_lp4_dq_odt()
959 u32 reg_value; in set_lp4_ca_odt() local
971 reg_value = io->ca_odt; in set_lp4_ca_odt()
973 reg_value = 0; in set_lp4_ca_odt()
977 clrsetbits_le32(&denali_ctl[139], 0x7 << 28, reg_value << 28); in set_lp4_ca_odt()
978 clrsetbits_le32(&denali_ctl[153], 0x7 << 28, reg_value << 28); in set_lp4_ca_odt()
980 clrsetbits_le32(&denali_pi[132], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
981 clrsetbits_le32(&denali_pi[139], 0x7 << 20, reg_value << 20); in set_lp4_ca_odt()
982 clrsetbits_le32(&denali_pi[147], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
983 clrsetbits_le32(&denali_pi[154], 0x7 << 20, reg_value << 20); in set_lp4_ca_odt()
986 clrsetbits_le32(&denali_ctl[140], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
987 clrsetbits_le32(&denali_ctl[154], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
989 clrsetbits_le32(&denali_pi[129], 0x7 << 20, reg_value << 20); in set_lp4_ca_odt()
990 clrsetbits_le32(&denali_pi[137], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
991 clrsetbits_le32(&denali_pi[144], 0x7 << 20, reg_value << 20); in set_lp4_ca_odt()
992 clrsetbits_le32(&denali_pi[152], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
996 clrsetbits_le32(&denali_ctl[140], 0x7 << 12, (reg_value << 12)); in set_lp4_ca_odt()
997 clrsetbits_le32(&denali_ctl[154], 0x7 << 12, (reg_value << 12)); in set_lp4_ca_odt()
999 clrsetbits_le32(&denali_pi[127], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
1000 clrsetbits_le32(&denali_pi[134], 0x7 << 20, reg_value << 20); in set_lp4_ca_odt()
1001 clrsetbits_le32(&denali_pi[142], 0x7 << 4, reg_value << 4); in set_lp4_ca_odt()
1002 clrsetbits_le32(&denali_pi[149], 0x7 << 20, reg_value << 20); in set_lp4_ca_odt()
1018 u32 reg_value; in set_lp4_MR3() local
1030 reg_value = ((io->pdds << 3) | 1); in set_lp4_MR3()
1033 clrsetbits_le32(&denali_ctl[138], 0xFFFF, reg_value); in set_lp4_MR3()
1034 clrsetbits_le32(&denali_ctl[152], 0xFFFF, reg_value); in set_lp4_MR3()
1036 clrsetbits_le32(&denali_pi[131], 0xFFFF << 16, reg_value << 16); in set_lp4_MR3()
1037 clrsetbits_le32(&denali_pi[139], 0xFFFF, reg_value); in set_lp4_MR3()
1038 clrsetbits_le32(&denali_pi[146], 0xFFFF << 16, reg_value << 16); in set_lp4_MR3()
1039 clrsetbits_le32(&denali_pi[154], 0xFFFF, reg_value); in set_lp4_MR3()
1043 reg_value << 16); in set_lp4_MR3()
1045 reg_value << 16); in set_lp4_MR3()
1047 clrsetbits_le32(&denali_pi[129], 0xFFFF, reg_value); in set_lp4_MR3()
1048 clrsetbits_le32(&denali_pi[136], 0xFFFF << 16, reg_value << 16); in set_lp4_MR3()
1049 clrsetbits_le32(&denali_pi[144], 0xFFFF, reg_value); in set_lp4_MR3()
1050 clrsetbits_le32(&denali_pi[151], 0xFFFF << 16, reg_value << 16); in set_lp4_MR3()
1054 clrsetbits_le32(&denali_ctl[139], 0xFFFF, reg_value); in set_lp4_MR3()
1055 clrsetbits_le32(&denali_ctl[153], 0xFFFF, reg_value); in set_lp4_MR3()
1057 clrsetbits_le32(&denali_pi[126], 0xFFFF << 16, reg_value << 16); in set_lp4_MR3()
1058 clrsetbits_le32(&denali_pi[134], 0xFFFF, reg_value); in set_lp4_MR3()
1059 clrsetbits_le32(&denali_pi[141], 0xFFFF << 16, reg_value << 16); in set_lp4_MR3()
1060 clrsetbits_le32(&denali_pi[149], 0xFFFF, reg_value); in set_lp4_MR3()
1076 u32 reg_value; in set_lp4_MR12() local
1088 reg_value = io->ca_vref; in set_lp4_MR12()
1092 reg_value << 16); in set_lp4_MR12()
1094 reg_value << 16); in set_lp4_MR12()
1096 clrsetbits_le32(&denali_pi[132], 0xFF << 8, reg_value << 8); in set_lp4_MR12()
1097 clrsetbits_le32(&denali_pi[139], 0xFF << 24, reg_value << 24); in set_lp4_MR12()
1098 clrsetbits_le32(&denali_pi[147], 0xFF << 8, reg_value << 8); in set_lp4_MR12()
1099 clrsetbits_le32(&denali_pi[154], 0xFF << 24, reg_value << 24); in set_lp4_MR12()
1102 clrsetbits_le32(&denali_ctl[141], 0xFFFF, reg_value); in set_lp4_MR12()
1103 clrsetbits_le32(&denali_ctl[155], 0xFFFF, reg_value); in set_lp4_MR12()
1105 clrsetbits_le32(&denali_pi[129], 0xFF << 24, reg_value << 24); in set_lp4_MR12()
1106 clrsetbits_le32(&denali_pi[137], 0xFF << 8, reg_value << 8); in set_lp4_MR12()
1107 clrsetbits_le32(&denali_pi[144], 0xFF << 24, reg_value << 24); in set_lp4_MR12()
1108 clrsetbits_le32(&denali_pi[152], 0xFF << 8, reg_value << 8); in set_lp4_MR12()
1113 reg_value << 16); in set_lp4_MR12()
1115 reg_value << 16); in set_lp4_MR12()
1117 clrsetbits_le32(&denali_pi[127], 0xFF << 8, reg_value << 8); in set_lp4_MR12()
1118 clrsetbits_le32(&denali_pi[134], 0xFF << 24, reg_value << 24); in set_lp4_MR12()
1119 clrsetbits_le32(&denali_pi[142], 0xFF << 8, reg_value << 8); in set_lp4_MR12()
1120 clrsetbits_le32(&denali_pi[149], 0xFF << 24, reg_value << 24); in set_lp4_MR12()
1136 u32 reg_value; in set_lp4_MR14() local
1148 reg_value = io->dq_vref; in set_lp4_MR14()
1152 reg_value << 16); in set_lp4_MR14()
1154 reg_value << 16); in set_lp4_MR14()
1156 clrsetbits_le32(&denali_pi[132], 0xFF << 16, reg_value << 16); in set_lp4_MR14()
1157 clrsetbits_le32(&denali_pi[140], 0xFF << 0, reg_value << 0); in set_lp4_MR14()
1158 clrsetbits_le32(&denali_pi[147], 0xFF << 16, reg_value << 16); in set_lp4_MR14()
1159 clrsetbits_le32(&denali_pi[155], 0xFF << 0, reg_value << 0); in set_lp4_MR14()
1162 clrsetbits_le32(&denali_ctl[143], 0xFFFF, reg_value); in set_lp4_MR14()
1163 clrsetbits_le32(&denali_ctl[157], 0xFFFF, reg_value); in set_lp4_MR14()
1165 clrsetbits_le32(&denali_pi[130], 0xFF << 0, reg_value << 0); in set_lp4_MR14()
1166 clrsetbits_le32(&denali_pi[137], 0xFF << 16, reg_value << 16); in set_lp4_MR14()
1167 clrsetbits_le32(&denali_pi[145], 0xFF << 0, reg_value << 0); in set_lp4_MR14()
1168 clrsetbits_le32(&denali_pi[152], 0xFF << 16, reg_value << 16); in set_lp4_MR14()
1173 reg_value << 16); in set_lp4_MR14()
1175 reg_value << 16); in set_lp4_MR14()
1177 clrsetbits_le32(&denali_pi[127], 0xFF << 16, reg_value << 16); in set_lp4_MR14()
1178 clrsetbits_le32(&denali_pi[135], 0xFF << 0, reg_value << 0); in set_lp4_MR14()
1179 clrsetbits_le32(&denali_pi[142], 0xFF << 16, reg_value << 16); in set_lp4_MR14()
1180 clrsetbits_le32(&denali_pi[150], 0xFF << 0, reg_value << 0); in set_lp4_MR14()