xref: /OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/stv6111.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Driver for the ST STV6111 tuner
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2014 Digital Devices GmbH
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
8*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License
9*4882a593Smuzhiyun  * version 2 only, as published by the Free Software Foundation.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful,
12*4882a593Smuzhiyun  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*4882a593Smuzhiyun  * GNU General Public License for more details.
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/moduleparam.h>
20*4882a593Smuzhiyun #include <linux/init.h>
21*4882a593Smuzhiyun #include <linux/delay.h>
22*4882a593Smuzhiyun #include <linux/firmware.h>
23*4882a593Smuzhiyun #include <linux/i2c.h>
24*4882a593Smuzhiyun #include <asm/div64.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include "stv6111.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #include <media/dvb_frontend.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun struct stv {
31*4882a593Smuzhiyun 	struct i2c_adapter *i2c;
32*4882a593Smuzhiyun 	u8 adr;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	u8 reg[11];
35*4882a593Smuzhiyun 	u32 ref_freq;
36*4882a593Smuzhiyun 	u32 frequency;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct slookup {
40*4882a593Smuzhiyun 	s16 value;
41*4882a593Smuzhiyun 	u16 reg_value;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static const struct slookup lnagain_nf_lookup[] = {
45*4882a593Smuzhiyun 	/* Gain *100dB // Reg */
46*4882a593Smuzhiyun 	{ 2572,	0 },
47*4882a593Smuzhiyun 	{ 2575, 1 },
48*4882a593Smuzhiyun 	{ 2580, 2 },
49*4882a593Smuzhiyun 	{ 2588, 3 },
50*4882a593Smuzhiyun 	{ 2596, 4 },
51*4882a593Smuzhiyun 	{ 2611, 5 },
52*4882a593Smuzhiyun 	{ 2633, 6 },
53*4882a593Smuzhiyun 	{ 2664, 7 },
54*4882a593Smuzhiyun 	{ 2701, 8 },
55*4882a593Smuzhiyun 	{ 2753, 9 },
56*4882a593Smuzhiyun 	{ 2816, 10 },
57*4882a593Smuzhiyun 	{ 2902, 11 },
58*4882a593Smuzhiyun 	{ 2995, 12 },
59*4882a593Smuzhiyun 	{ 3104, 13 },
60*4882a593Smuzhiyun 	{ 3215, 14 },
61*4882a593Smuzhiyun 	{ 3337, 15 },
62*4882a593Smuzhiyun 	{ 3492, 16 },
63*4882a593Smuzhiyun 	{ 3614, 17 },
64*4882a593Smuzhiyun 	{ 3731, 18 },
65*4882a593Smuzhiyun 	{ 3861, 19 },
66*4882a593Smuzhiyun 	{ 3988, 20 },
67*4882a593Smuzhiyun 	{ 4124, 21 },
68*4882a593Smuzhiyun 	{ 4253, 22 },
69*4882a593Smuzhiyun 	{ 4386,	23 },
70*4882a593Smuzhiyun 	{ 4505,	24 },
71*4882a593Smuzhiyun 	{ 4623,	25 },
72*4882a593Smuzhiyun 	{ 4726,	26 },
73*4882a593Smuzhiyun 	{ 4821,	27 },
74*4882a593Smuzhiyun 	{ 4903,	28 },
75*4882a593Smuzhiyun 	{ 4979,	29 },
76*4882a593Smuzhiyun 	{ 5045,	30 },
77*4882a593Smuzhiyun 	{ 5102,	31 }
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static const struct slookup lnagain_iip3_lookup[] = {
81*4882a593Smuzhiyun 	/* Gain *100dB // reg */
82*4882a593Smuzhiyun 	{ 1548,	0 },
83*4882a593Smuzhiyun 	{ 1552,	1 },
84*4882a593Smuzhiyun 	{ 1569,	2 },
85*4882a593Smuzhiyun 	{ 1565,	3 },
86*4882a593Smuzhiyun 	{ 1577,	4 },
87*4882a593Smuzhiyun 	{ 1594,	5 },
88*4882a593Smuzhiyun 	{ 1627,	6 },
89*4882a593Smuzhiyun 	{ 1656,	7 },
90*4882a593Smuzhiyun 	{ 1700,	8 },
91*4882a593Smuzhiyun 	{ 1748,	9 },
92*4882a593Smuzhiyun 	{ 1805,	10 },
93*4882a593Smuzhiyun 	{ 1896,	11 },
94*4882a593Smuzhiyun 	{ 1995,	12 },
95*4882a593Smuzhiyun 	{ 2113,	13 },
96*4882a593Smuzhiyun 	{ 2233,	14 },
97*4882a593Smuzhiyun 	{ 2366,	15 },
98*4882a593Smuzhiyun 	{ 2543,	16 },
99*4882a593Smuzhiyun 	{ 2687,	17 },
100*4882a593Smuzhiyun 	{ 2842,	18 },
101*4882a593Smuzhiyun 	{ 2999,	19 },
102*4882a593Smuzhiyun 	{ 3167,	20 },
103*4882a593Smuzhiyun 	{ 3342,	21 },
104*4882a593Smuzhiyun 	{ 3507,	22 },
105*4882a593Smuzhiyun 	{ 3679,	23 },
106*4882a593Smuzhiyun 	{ 3827,	24 },
107*4882a593Smuzhiyun 	{ 3970,	25 },
108*4882a593Smuzhiyun 	{ 4094,	26 },
109*4882a593Smuzhiyun 	{ 4210,	27 },
110*4882a593Smuzhiyun 	{ 4308,	28 },
111*4882a593Smuzhiyun 	{ 4396,	29 },
112*4882a593Smuzhiyun 	{ 4468,	30 },
113*4882a593Smuzhiyun 	{ 4535,	31 }
114*4882a593Smuzhiyun };
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static const struct slookup gain_rfagc_lookup[] = {
117*4882a593Smuzhiyun 	/* Gain *100dB // reg */
118*4882a593Smuzhiyun 	{ 4870,	0x3000 },
119*4882a593Smuzhiyun 	{ 4850,	0x3C00 },
120*4882a593Smuzhiyun 	{ 4800,	0x4500 },
121*4882a593Smuzhiyun 	{ 4750,	0x4800 },
122*4882a593Smuzhiyun 	{ 4700,	0x4B00 },
123*4882a593Smuzhiyun 	{ 4650,	0x4D00 },
124*4882a593Smuzhiyun 	{ 4600,	0x4F00 },
125*4882a593Smuzhiyun 	{ 4550,	0x5100 },
126*4882a593Smuzhiyun 	{ 4500,	0x5200 },
127*4882a593Smuzhiyun 	{ 4420,	0x5500 },
128*4882a593Smuzhiyun 	{ 4316,	0x5800 },
129*4882a593Smuzhiyun 	{ 4200,	0x5B00 },
130*4882a593Smuzhiyun 	{ 4119,	0x5D00 },
131*4882a593Smuzhiyun 	{ 3999,	0x6000 },
132*4882a593Smuzhiyun 	{ 3950,	0x6100 },
133*4882a593Smuzhiyun 	{ 3876,	0x6300 },
134*4882a593Smuzhiyun 	{ 3755,	0x6600 },
135*4882a593Smuzhiyun 	{ 3641,	0x6900 },
136*4882a593Smuzhiyun 	{ 3567,	0x6B00 },
137*4882a593Smuzhiyun 	{ 3425,	0x6F00 },
138*4882a593Smuzhiyun 	{ 3350,	0x7100 },
139*4882a593Smuzhiyun 	{ 3236,	0x7400 },
140*4882a593Smuzhiyun 	{ 3118,	0x7700 },
141*4882a593Smuzhiyun 	{ 3004,	0x7A00 },
142*4882a593Smuzhiyun 	{ 2917,	0x7C00 },
143*4882a593Smuzhiyun 	{ 2776,	0x7F00 },
144*4882a593Smuzhiyun 	{ 2635,	0x8200 },
145*4882a593Smuzhiyun 	{ 2516,	0x8500 },
146*4882a593Smuzhiyun 	{ 2406,	0x8800 },
147*4882a593Smuzhiyun 	{ 2290,	0x8B00 },
148*4882a593Smuzhiyun 	{ 2170,	0x8E00 },
149*4882a593Smuzhiyun 	{ 2073,	0x9100 },
150*4882a593Smuzhiyun 	{ 1949,	0x9400 },
151*4882a593Smuzhiyun 	{ 1836,	0x9700 },
152*4882a593Smuzhiyun 	{ 1712,	0x9A00 },
153*4882a593Smuzhiyun 	{ 1631,	0x9C00 },
154*4882a593Smuzhiyun 	{ 1515,	0x9F00 },
155*4882a593Smuzhiyun 	{ 1400,	0xA200 },
156*4882a593Smuzhiyun 	{ 1323,	0xA400 },
157*4882a593Smuzhiyun 	{ 1203,	0xA700 },
158*4882a593Smuzhiyun 	{ 1091,	0xAA00 },
159*4882a593Smuzhiyun 	{ 1011,	0xAC00 },
160*4882a593Smuzhiyun 	{ 904,	0xAF00 },
161*4882a593Smuzhiyun 	{ 787,	0xB200 },
162*4882a593Smuzhiyun 	{ 685,	0xB500 },
163*4882a593Smuzhiyun 	{ 571,	0xB800 },
164*4882a593Smuzhiyun 	{ 464,	0xBB00 },
165*4882a593Smuzhiyun 	{ 374,	0xBE00 },
166*4882a593Smuzhiyun 	{ 275,	0xC200 },
167*4882a593Smuzhiyun 	{ 181,	0xC600 },
168*4882a593Smuzhiyun 	{ 102,	0xCC00 },
169*4882a593Smuzhiyun 	{ 49,	0xD900 }
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun /*
173*4882a593Smuzhiyun  * This table is 6 dB too low comapred to the others (probably created with
174*4882a593Smuzhiyun  * a different BB_MAG setting)
175*4882a593Smuzhiyun  */
176*4882a593Smuzhiyun static const struct slookup gain_channel_agc_nf_lookup[] = {
177*4882a593Smuzhiyun 	/* Gain *100dB // reg */
178*4882a593Smuzhiyun 	{ 7082,	0x3000 },
179*4882a593Smuzhiyun 	{ 7052,	0x4000 },
180*4882a593Smuzhiyun 	{ 7007,	0x4600 },
181*4882a593Smuzhiyun 	{ 6954,	0x4A00 },
182*4882a593Smuzhiyun 	{ 6909,	0x4D00 },
183*4882a593Smuzhiyun 	{ 6833,	0x5100 },
184*4882a593Smuzhiyun 	{ 6753,	0x5400 },
185*4882a593Smuzhiyun 	{ 6659,	0x5700 },
186*4882a593Smuzhiyun 	{ 6561,	0x5A00 },
187*4882a593Smuzhiyun 	{ 6472,	0x5C00 },
188*4882a593Smuzhiyun 	{ 6366,	0x5F00 },
189*4882a593Smuzhiyun 	{ 6259,	0x6100 },
190*4882a593Smuzhiyun 	{ 6151,	0x6400 },
191*4882a593Smuzhiyun 	{ 6026,	0x6700 },
192*4882a593Smuzhiyun 	{ 5920,	0x6900 },
193*4882a593Smuzhiyun 	{ 5835,	0x6B00 },
194*4882a593Smuzhiyun 	{ 5770,	0x6C00 },
195*4882a593Smuzhiyun 	{ 5681,	0x6E00 },
196*4882a593Smuzhiyun 	{ 5596,	0x7000 },
197*4882a593Smuzhiyun 	{ 5503,	0x7200 },
198*4882a593Smuzhiyun 	{ 5429,	0x7300 },
199*4882a593Smuzhiyun 	{ 5319,	0x7500 },
200*4882a593Smuzhiyun 	{ 5220,	0x7700 },
201*4882a593Smuzhiyun 	{ 5111,	0x7900 },
202*4882a593Smuzhiyun 	{ 4983,	0x7B00 },
203*4882a593Smuzhiyun 	{ 4876,	0x7D00 },
204*4882a593Smuzhiyun 	{ 4755,	0x7F00 },
205*4882a593Smuzhiyun 	{ 4635,	0x8100 },
206*4882a593Smuzhiyun 	{ 4499,	0x8300 },
207*4882a593Smuzhiyun 	{ 4405,	0x8500 },
208*4882a593Smuzhiyun 	{ 4323,	0x8600 },
209*4882a593Smuzhiyun 	{ 4233,	0x8800 },
210*4882a593Smuzhiyun 	{ 4156,	0x8A00 },
211*4882a593Smuzhiyun 	{ 4038,	0x8C00 },
212*4882a593Smuzhiyun 	{ 3935,	0x8E00 },
213*4882a593Smuzhiyun 	{ 3823,	0x9000 },
214*4882a593Smuzhiyun 	{ 3712,	0x9200 },
215*4882a593Smuzhiyun 	{ 3601,	0x9500 },
216*4882a593Smuzhiyun 	{ 3511,	0x9700 },
217*4882a593Smuzhiyun 	{ 3413,	0x9900 },
218*4882a593Smuzhiyun 	{ 3309,	0x9B00 },
219*4882a593Smuzhiyun 	{ 3213,	0x9D00 },
220*4882a593Smuzhiyun 	{ 3088,	0x9F00 },
221*4882a593Smuzhiyun 	{ 2992,	0xA100 },
222*4882a593Smuzhiyun 	{ 2878,	0xA400 },
223*4882a593Smuzhiyun 	{ 2769,	0xA700 },
224*4882a593Smuzhiyun 	{ 2645,	0xAA00 },
225*4882a593Smuzhiyun 	{ 2538,	0xAD00 },
226*4882a593Smuzhiyun 	{ 2441,	0xB000 },
227*4882a593Smuzhiyun 	{ 2350,	0xB600 },
228*4882a593Smuzhiyun 	{ 2237,	0xBA00 },
229*4882a593Smuzhiyun 	{ 2137,	0xBF00 },
230*4882a593Smuzhiyun 	{ 2039,	0xC500 },
231*4882a593Smuzhiyun 	{ 1938,	0xDF00 },
232*4882a593Smuzhiyun 	{ 1927,	0xFF00 }
233*4882a593Smuzhiyun };
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun static const struct slookup gain_channel_agc_iip3_lookup[] = {
236*4882a593Smuzhiyun 	/* Gain *100dB // reg */
237*4882a593Smuzhiyun 	{ 7070,	0x3000 },
238*4882a593Smuzhiyun 	{ 7028,	0x4000 },
239*4882a593Smuzhiyun 	{ 7019,	0x4600 },
240*4882a593Smuzhiyun 	{ 6900,	0x4A00 },
241*4882a593Smuzhiyun 	{ 6811,	0x4D00 },
242*4882a593Smuzhiyun 	{ 6763,	0x5100 },
243*4882a593Smuzhiyun 	{ 6690,	0x5400 },
244*4882a593Smuzhiyun 	{ 6644,	0x5700 },
245*4882a593Smuzhiyun 	{ 6617,	0x5A00 },
246*4882a593Smuzhiyun 	{ 6598,	0x5C00 },
247*4882a593Smuzhiyun 	{ 6462,	0x5F00 },
248*4882a593Smuzhiyun 	{ 6348,	0x6100 },
249*4882a593Smuzhiyun 	{ 6197,	0x6400 },
250*4882a593Smuzhiyun 	{ 6154,	0x6700 },
251*4882a593Smuzhiyun 	{ 6098,	0x6900 },
252*4882a593Smuzhiyun 	{ 5893,	0x6B00 },
253*4882a593Smuzhiyun 	{ 5812,	0x6C00 },
254*4882a593Smuzhiyun 	{ 5773,	0x6E00 },
255*4882a593Smuzhiyun 	{ 5723,	0x7000 },
256*4882a593Smuzhiyun 	{ 5661,	0x7200 },
257*4882a593Smuzhiyun 	{ 5579,	0x7300 },
258*4882a593Smuzhiyun 	{ 5460,	0x7500 },
259*4882a593Smuzhiyun 	{ 5308,	0x7700 },
260*4882a593Smuzhiyun 	{ 5099,	0x7900 },
261*4882a593Smuzhiyun 	{ 4910,	0x7B00 },
262*4882a593Smuzhiyun 	{ 4800,	0x7D00 },
263*4882a593Smuzhiyun 	{ 4785,	0x7F00 },
264*4882a593Smuzhiyun 	{ 4635,	0x8100 },
265*4882a593Smuzhiyun 	{ 4466,	0x8300 },
266*4882a593Smuzhiyun 	{ 4314,	0x8500 },
267*4882a593Smuzhiyun 	{ 4295,	0x8600 },
268*4882a593Smuzhiyun 	{ 4144,	0x8800 },
269*4882a593Smuzhiyun 	{ 3920,	0x8A00 },
270*4882a593Smuzhiyun 	{ 3889,	0x8C00 },
271*4882a593Smuzhiyun 	{ 3771,	0x8E00 },
272*4882a593Smuzhiyun 	{ 3655,	0x9000 },
273*4882a593Smuzhiyun 	{ 3446,	0x9200 },
274*4882a593Smuzhiyun 	{ 3298,	0x9500 },
275*4882a593Smuzhiyun 	{ 3083,	0x9700 },
276*4882a593Smuzhiyun 	{ 3015,	0x9900 },
277*4882a593Smuzhiyun 	{ 2833,	0x9B00 },
278*4882a593Smuzhiyun 	{ 2746,	0x9D00 },
279*4882a593Smuzhiyun 	{ 2632,	0x9F00 },
280*4882a593Smuzhiyun 	{ 2598,	0xA100 },
281*4882a593Smuzhiyun 	{ 2480,	0xA400 },
282*4882a593Smuzhiyun 	{ 2236,	0xA700 },
283*4882a593Smuzhiyun 	{ 2171,	0xAA00 },
284*4882a593Smuzhiyun 	{ 2060,	0xAD00 },
285*4882a593Smuzhiyun 	{ 1999,	0xB000 },
286*4882a593Smuzhiyun 	{ 1974,	0xB600 },
287*4882a593Smuzhiyun 	{ 1820,	0xBA00 },
288*4882a593Smuzhiyun 	{ 1741,	0xBF00 },
289*4882a593Smuzhiyun 	{ 1655,	0xC500 },
290*4882a593Smuzhiyun 	{ 1444,	0xDF00 },
291*4882a593Smuzhiyun 	{ 1325,	0xFF00 },
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun 
muldiv32(u32 a,u32 b,u32 c)294*4882a593Smuzhiyun static inline u32 muldiv32(u32 a, u32 b, u32 c)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun 	u64 tmp64;
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	tmp64 = (u64)a * (u64)b;
299*4882a593Smuzhiyun 	do_div(tmp64, c);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	return (u32)tmp64;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun 
i2c_read(struct i2c_adapter * adap,u8 adr,u8 * msg,int len,u8 * answ,int alen)304*4882a593Smuzhiyun static int i2c_read(struct i2c_adapter *adap,
305*4882a593Smuzhiyun 		    u8 adr, u8 *msg, int len, u8 *answ, int alen)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	struct i2c_msg msgs[2] = { { .addr = adr, .flags = 0,
308*4882a593Smuzhiyun 				     .buf = msg, .len = len},
309*4882a593Smuzhiyun 				   { .addr = adr, .flags = I2C_M_RD,
310*4882a593Smuzhiyun 				     .buf = answ, .len = alen } };
311*4882a593Smuzhiyun 	if (i2c_transfer(adap, msgs, 2) != 2) {
312*4882a593Smuzhiyun 		dev_err(&adap->dev, "i2c read error\n");
313*4882a593Smuzhiyun 		return -EIO;
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun 	return 0;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
i2c_write(struct i2c_adapter * adap,u8 adr,u8 * data,int len)318*4882a593Smuzhiyun static int i2c_write(struct i2c_adapter *adap, u8 adr, u8 *data, int len)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	struct i2c_msg msg = {.addr = adr, .flags = 0,
321*4882a593Smuzhiyun 			      .buf = data, .len = len};
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	if (i2c_transfer(adap, &msg, 1) != 1) {
324*4882a593Smuzhiyun 		dev_err(&adap->dev, "i2c write error\n");
325*4882a593Smuzhiyun 		return -EIO;
326*4882a593Smuzhiyun 	}
327*4882a593Smuzhiyun 	return 0;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun 
write_regs(struct stv * state,int reg,int len)330*4882a593Smuzhiyun static int write_regs(struct stv *state, int reg, int len)
331*4882a593Smuzhiyun {
332*4882a593Smuzhiyun 	u8 d[12];
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	memcpy(&d[1], &state->reg[reg], len);
335*4882a593Smuzhiyun 	d[0] = reg;
336*4882a593Smuzhiyun 	return i2c_write(state->i2c, state->adr, d, len + 1);
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun 
write_reg(struct stv * state,u8 reg,u8 val)339*4882a593Smuzhiyun static int write_reg(struct stv *state, u8 reg, u8 val)
340*4882a593Smuzhiyun {
341*4882a593Smuzhiyun 	u8 d[2] = {reg, val};
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	return i2c_write(state->i2c, state->adr, d, 2);
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun 
read_reg(struct stv * state,u8 reg,u8 * val)346*4882a593Smuzhiyun static int read_reg(struct stv *state, u8 reg, u8 *val)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun 	return i2c_read(state->i2c, state->adr, &reg, 1, val, 1);
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun 
wait_for_call_done(struct stv * state,u8 mask)351*4882a593Smuzhiyun static int wait_for_call_done(struct stv *state, u8 mask)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun 	int status = 0;
354*4882a593Smuzhiyun 	u32 lock_retry_count = 10;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	while (lock_retry_count > 0) {
357*4882a593Smuzhiyun 		u8 regval;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 		status = read_reg(state, 9, &regval);
360*4882a593Smuzhiyun 		if (status < 0)
361*4882a593Smuzhiyun 			return status;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 		if ((regval & mask) == 0)
364*4882a593Smuzhiyun 			break;
365*4882a593Smuzhiyun 		usleep_range(4000, 6000);
366*4882a593Smuzhiyun 		lock_retry_count -= 1;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 		status = -EIO;
369*4882a593Smuzhiyun 	}
370*4882a593Smuzhiyun 	return status;
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun 
init_state(struct stv * state)373*4882a593Smuzhiyun static void init_state(struct stv *state)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	u32 clkdiv = 0;
376*4882a593Smuzhiyun 	u32 agcmode = 0;
377*4882a593Smuzhiyun 	u32 agcref = 2;
378*4882a593Smuzhiyun 	u32 agcset = 0xffffffff;
379*4882a593Smuzhiyun 	u32 bbmode = 0xffffffff;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	state->reg[0] = 0x08;
382*4882a593Smuzhiyun 	state->reg[1] = 0x41;
383*4882a593Smuzhiyun 	state->reg[2] = 0x8f;
384*4882a593Smuzhiyun 	state->reg[3] = 0x00;
385*4882a593Smuzhiyun 	state->reg[4] = 0xce;
386*4882a593Smuzhiyun 	state->reg[5] = 0x54;
387*4882a593Smuzhiyun 	state->reg[6] = 0x55;
388*4882a593Smuzhiyun 	state->reg[7] = 0x45;
389*4882a593Smuzhiyun 	state->reg[8] = 0x46;
390*4882a593Smuzhiyun 	state->reg[9] = 0xbd;
391*4882a593Smuzhiyun 	state->reg[10] = 0x11;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	state->ref_freq = 16000;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	if (clkdiv <= 3)
396*4882a593Smuzhiyun 		state->reg[0x00] |= (clkdiv & 0x03);
397*4882a593Smuzhiyun 	if (agcmode <= 3) {
398*4882a593Smuzhiyun 		state->reg[0x03] |= (agcmode << 5);
399*4882a593Smuzhiyun 		if (agcmode == 0x01)
400*4882a593Smuzhiyun 			state->reg[0x01] |= 0x30;
401*4882a593Smuzhiyun 	}
402*4882a593Smuzhiyun 	if (bbmode <= 3)
403*4882a593Smuzhiyun 		state->reg[0x01] = (state->reg[0x01] & ~0x30) | (bbmode << 4);
404*4882a593Smuzhiyun 	if (agcref <= 7)
405*4882a593Smuzhiyun 		state->reg[0x03] |= agcref;
406*4882a593Smuzhiyun 	if (agcset <= 31)
407*4882a593Smuzhiyun 		state->reg[0x02] = (state->reg[0x02] & ~0x1F) | agcset | 0x40;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
attach_init(struct stv * state)410*4882a593Smuzhiyun static int attach_init(struct stv *state)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun 	if (write_regs(state, 0, 11))
413*4882a593Smuzhiyun 		return -ENODEV;
414*4882a593Smuzhiyun 	return 0;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun 
release(struct dvb_frontend * fe)417*4882a593Smuzhiyun static void release(struct dvb_frontend *fe)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun 	kfree(fe->tuner_priv);
420*4882a593Smuzhiyun 	fe->tuner_priv = NULL;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun 
set_bandwidth(struct dvb_frontend * fe,u32 cutoff_frequency)423*4882a593Smuzhiyun static int set_bandwidth(struct dvb_frontend *fe, u32 cutoff_frequency)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun 	struct stv *state = fe->tuner_priv;
426*4882a593Smuzhiyun 	u32 index = (cutoff_frequency + 999999) / 1000000;
427*4882a593Smuzhiyun 	int stat = 0;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	if (index < 6)
430*4882a593Smuzhiyun 		index = 6;
431*4882a593Smuzhiyun 	if (index > 50)
432*4882a593Smuzhiyun 		index = 50;
433*4882a593Smuzhiyun 	if ((state->reg[0x08] & ~0xFC) == ((index - 6) << 2))
434*4882a593Smuzhiyun 		return 0;
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	state->reg[0x08] = (state->reg[0x08] & ~0xFC) | ((index - 6) << 2);
437*4882a593Smuzhiyun 	state->reg[0x09] = (state->reg[0x09] & ~0x0C) | 0x08;
438*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
439*4882a593Smuzhiyun 		stat = fe->ops.i2c_gate_ctrl(fe, 1);
440*4882a593Smuzhiyun 	if (!stat) {
441*4882a593Smuzhiyun 		write_regs(state, 0x08, 2);
442*4882a593Smuzhiyun 		wait_for_call_done(state, 0x08);
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl && !stat)
445*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
446*4882a593Smuzhiyun 	return stat;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun 
set_lof(struct stv * state,u32 local_frequency,u32 cutoff_frequency)449*4882a593Smuzhiyun static int set_lof(struct stv *state, u32 local_frequency, u32 cutoff_frequency)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	u32 index = (cutoff_frequency + 999999) / 1000000;
452*4882a593Smuzhiyun 	u32 frequency = (local_frequency + 500) / 1000;
453*4882a593Smuzhiyun 	u32 p = 1, psel = 0, fvco, div, frac;
454*4882a593Smuzhiyun 	u8 icp, tmp;
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 	if (index < 6)
457*4882a593Smuzhiyun 		index = 6;
458*4882a593Smuzhiyun 	if (index > 50)
459*4882a593Smuzhiyun 		index = 50;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	if (frequency <= 1300000) {
462*4882a593Smuzhiyun 		p =  4;
463*4882a593Smuzhiyun 		psel = 1;
464*4882a593Smuzhiyun 	} else {
465*4882a593Smuzhiyun 		p =  2;
466*4882a593Smuzhiyun 		psel = 0;
467*4882a593Smuzhiyun 	}
468*4882a593Smuzhiyun 	fvco = frequency * p;
469*4882a593Smuzhiyun 	div = fvco / state->ref_freq;
470*4882a593Smuzhiyun 	frac = fvco % state->ref_freq;
471*4882a593Smuzhiyun 	frac = muldiv32(frac, 0x40000, state->ref_freq);
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	icp = 0;
474*4882a593Smuzhiyun 	if (fvco < 2700000)
475*4882a593Smuzhiyun 		icp = 0;
476*4882a593Smuzhiyun 	else if (fvco < 2950000)
477*4882a593Smuzhiyun 		icp = 1;
478*4882a593Smuzhiyun 	else if (fvco < 3300000)
479*4882a593Smuzhiyun 		icp = 2;
480*4882a593Smuzhiyun 	else if (fvco < 3700000)
481*4882a593Smuzhiyun 		icp = 3;
482*4882a593Smuzhiyun 	else if (fvco < 4200000)
483*4882a593Smuzhiyun 		icp = 5;
484*4882a593Smuzhiyun 	else if (fvco < 4800000)
485*4882a593Smuzhiyun 		icp = 6;
486*4882a593Smuzhiyun 	else
487*4882a593Smuzhiyun 		icp = 7;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	state->reg[0x02] |= 0x80; /* LNA IIP3 Mode */
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	state->reg[0x03] = (state->reg[0x03] & ~0x80) | (psel << 7);
492*4882a593Smuzhiyun 	state->reg[0x04] = (div & 0xFF);
493*4882a593Smuzhiyun 	state->reg[0x05] = (((div >> 8) & 0x01) | ((frac & 0x7F) << 1)) & 0xff;
494*4882a593Smuzhiyun 	state->reg[0x06] = ((frac >> 7) & 0xFF);
495*4882a593Smuzhiyun 	state->reg[0x07] = (state->reg[0x07] & ~0x07) | ((frac >> 15) & 0x07);
496*4882a593Smuzhiyun 	state->reg[0x07] = (state->reg[0x07] & ~0xE0) | (icp << 5);
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	state->reg[0x08] = (state->reg[0x08] & ~0xFC) | ((index - 6) << 2);
499*4882a593Smuzhiyun 	/* Start cal vco,CF */
500*4882a593Smuzhiyun 	state->reg[0x09] = (state->reg[0x09] & ~0x0C) | 0x0C;
501*4882a593Smuzhiyun 	write_regs(state, 2, 8);
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	wait_for_call_done(state, 0x0C);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	usleep_range(10000, 12000);
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	read_reg(state, 0x03, &tmp);
508*4882a593Smuzhiyun 	if (tmp & 0x10)	{
509*4882a593Smuzhiyun 		state->reg[0x02] &= ~0x80; /* LNA NF Mode */
510*4882a593Smuzhiyun 		write_regs(state, 2, 1);
511*4882a593Smuzhiyun 	}
512*4882a593Smuzhiyun 	read_reg(state, 0x08, &tmp);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun 	state->frequency = frequency;
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	return 0;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
set_params(struct dvb_frontend * fe)519*4882a593Smuzhiyun static int set_params(struct dvb_frontend *fe)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun 	struct stv *state = fe->tuner_priv;
522*4882a593Smuzhiyun 	struct dtv_frontend_properties *p = &fe->dtv_property_cache;
523*4882a593Smuzhiyun 	u32 freq, cutoff;
524*4882a593Smuzhiyun 	int stat = 0;
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	if (p->delivery_system != SYS_DVBS && p->delivery_system != SYS_DVBS2)
527*4882a593Smuzhiyun 		return -EINVAL;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	freq = p->frequency * 1000;
530*4882a593Smuzhiyun 	cutoff = 5000000 + muldiv32(p->symbol_rate, 135, 200);
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
533*4882a593Smuzhiyun 		stat = fe->ops.i2c_gate_ctrl(fe, 1);
534*4882a593Smuzhiyun 	if (!stat)
535*4882a593Smuzhiyun 		set_lof(state, freq, cutoff);
536*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl && !stat)
537*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
538*4882a593Smuzhiyun 	return 0;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun 
table_lookup(const struct slookup * table,int table_size,u16 reg_value)541*4882a593Smuzhiyun static s32 table_lookup(const struct slookup *table,
542*4882a593Smuzhiyun 			int table_size, u16 reg_value)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun 	s32 gain;
545*4882a593Smuzhiyun 	s32 reg_diff;
546*4882a593Smuzhiyun 	int imin = 0;
547*4882a593Smuzhiyun 	int imax = table_size - 1;
548*4882a593Smuzhiyun 	int i;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	/* Assumes Table[0].RegValue < Table[imax].RegValue */
551*4882a593Smuzhiyun 	if (reg_value <= table[0].reg_value) {
552*4882a593Smuzhiyun 		gain = table[0].value;
553*4882a593Smuzhiyun 	} else if (reg_value >= table[imax].reg_value) {
554*4882a593Smuzhiyun 		gain = table[imax].value;
555*4882a593Smuzhiyun 	} else {
556*4882a593Smuzhiyun 		while ((imax - imin) > 1) {
557*4882a593Smuzhiyun 			i = (imax + imin) / 2;
558*4882a593Smuzhiyun 			if ((table[imin].reg_value <= reg_value) &&
559*4882a593Smuzhiyun 			    (reg_value <= table[i].reg_value))
560*4882a593Smuzhiyun 				imax = i;
561*4882a593Smuzhiyun 			else
562*4882a593Smuzhiyun 				imin = i;
563*4882a593Smuzhiyun 		}
564*4882a593Smuzhiyun 		reg_diff = table[imax].reg_value - table[imin].reg_value;
565*4882a593Smuzhiyun 		gain = table[imin].value;
566*4882a593Smuzhiyun 		if (reg_diff != 0)
567*4882a593Smuzhiyun 			gain += ((s32)(reg_value - table[imin].reg_value) *
568*4882a593Smuzhiyun 				(s32)(table[imax].value
569*4882a593Smuzhiyun 				- table[imin].value)) / reg_diff;
570*4882a593Smuzhiyun 	}
571*4882a593Smuzhiyun 	return gain;
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun 
get_rf_strength(struct dvb_frontend * fe,u16 * st)574*4882a593Smuzhiyun static int get_rf_strength(struct dvb_frontend *fe, u16 *st)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun 	struct stv *state = fe->tuner_priv;
577*4882a593Smuzhiyun 	u16 rfagc = *st;
578*4882a593Smuzhiyun 	s32 gain;
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	if ((state->reg[0x03] & 0x60) == 0) {
581*4882a593Smuzhiyun 		/* RF Mode, Read AGC ADC */
582*4882a593Smuzhiyun 		u8 reg = 0;
583*4882a593Smuzhiyun 		int stat = 0;
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 		if (fe->ops.i2c_gate_ctrl)
586*4882a593Smuzhiyun 			stat = fe->ops.i2c_gate_ctrl(fe, 1);
587*4882a593Smuzhiyun 		if (!stat) {
588*4882a593Smuzhiyun 			write_reg(state, 0x02, state->reg[0x02] | 0x20);
589*4882a593Smuzhiyun 			read_reg(state, 2, &reg);
590*4882a593Smuzhiyun 			if (reg & 0x20)
591*4882a593Smuzhiyun 				read_reg(state, 2, &reg);
592*4882a593Smuzhiyun 		}
593*4882a593Smuzhiyun 		if (fe->ops.i2c_gate_ctrl && !stat)
594*4882a593Smuzhiyun 			fe->ops.i2c_gate_ctrl(fe, 0);
595*4882a593Smuzhiyun 
596*4882a593Smuzhiyun 		if ((state->reg[0x02] & 0x80) == 0)
597*4882a593Smuzhiyun 			/* NF */
598*4882a593Smuzhiyun 			gain = table_lookup(lnagain_nf_lookup,
599*4882a593Smuzhiyun 					    ARRAY_SIZE(lnagain_nf_lookup),
600*4882a593Smuzhiyun 					    reg & 0x1F);
601*4882a593Smuzhiyun 		else
602*4882a593Smuzhiyun 			/* IIP3 */
603*4882a593Smuzhiyun 			gain = table_lookup(lnagain_iip3_lookup,
604*4882a593Smuzhiyun 					    ARRAY_SIZE(lnagain_iip3_lookup),
605*4882a593Smuzhiyun 					    reg & 0x1F);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 		gain += table_lookup(gain_rfagc_lookup,
608*4882a593Smuzhiyun 				     ARRAY_SIZE(gain_rfagc_lookup), rfagc);
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 		gain -= 2400;
611*4882a593Smuzhiyun 	} else {
612*4882a593Smuzhiyun 		/* Channel Mode */
613*4882a593Smuzhiyun 		if ((state->reg[0x02] & 0x80) == 0) {
614*4882a593Smuzhiyun 			/* NF */
615*4882a593Smuzhiyun 			gain = table_lookup(
616*4882a593Smuzhiyun 				gain_channel_agc_nf_lookup,
617*4882a593Smuzhiyun 				ARRAY_SIZE(gain_channel_agc_nf_lookup), rfagc);
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 			gain += 600;
620*4882a593Smuzhiyun 		} else {
621*4882a593Smuzhiyun 			/* IIP3 */
622*4882a593Smuzhiyun 			gain = table_lookup(
623*4882a593Smuzhiyun 				gain_channel_agc_iip3_lookup,
624*4882a593Smuzhiyun 				ARRAY_SIZE(gain_channel_agc_iip3_lookup),
625*4882a593Smuzhiyun 				rfagc);
626*4882a593Smuzhiyun 		}
627*4882a593Smuzhiyun 	}
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun 	if (state->frequency > 0)
630*4882a593Smuzhiyun 		/* Tilt correction ( 0.00016 dB/MHz ) */
631*4882a593Smuzhiyun 		gain -= ((((s32)(state->frequency / 1000) - 1550) * 2) / 12);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	/* + (BBGain * 10); */
634*4882a593Smuzhiyun 	gain +=  (s32)((state->reg[0x01] & 0xC0) >> 6) * 600 - 1300;
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	if (gain < 0)
637*4882a593Smuzhiyun 		gain = 0;
638*4882a593Smuzhiyun 	else if (gain > 10000)
639*4882a593Smuzhiyun 		gain = 10000;
640*4882a593Smuzhiyun 
641*4882a593Smuzhiyun 	*st = 10000 - gain;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun static const struct dvb_tuner_ops tuner_ops = {
647*4882a593Smuzhiyun 	.info = {
648*4882a593Smuzhiyun 		.name		= "ST STV6111",
649*4882a593Smuzhiyun 		.frequency_min_hz =  950 * MHz,
650*4882a593Smuzhiyun 		.frequency_max_hz = 2150 * MHz,
651*4882a593Smuzhiyun 	},
652*4882a593Smuzhiyun 	.set_params		= set_params,
653*4882a593Smuzhiyun 	.release		= release,
654*4882a593Smuzhiyun 	.get_rf_strength	= get_rf_strength,
655*4882a593Smuzhiyun 	.set_bandwidth		= set_bandwidth,
656*4882a593Smuzhiyun };
657*4882a593Smuzhiyun 
stv6111_attach(struct dvb_frontend * fe,struct i2c_adapter * i2c,u8 adr)658*4882a593Smuzhiyun struct dvb_frontend *stv6111_attach(struct dvb_frontend *fe,
659*4882a593Smuzhiyun 				    struct i2c_adapter *i2c, u8 adr)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun 	struct stv *state;
662*4882a593Smuzhiyun 	int stat = -ENODEV;
663*4882a593Smuzhiyun 	int gatestat = 0;
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	state = kzalloc(sizeof(*state), GFP_KERNEL);
666*4882a593Smuzhiyun 	if (!state)
667*4882a593Smuzhiyun 		return NULL;
668*4882a593Smuzhiyun 	state->adr = adr;
669*4882a593Smuzhiyun 	state->i2c = i2c;
670*4882a593Smuzhiyun 	memcpy(&fe->ops.tuner_ops, &tuner_ops, sizeof(struct dvb_tuner_ops));
671*4882a593Smuzhiyun 	init_state(state);
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl)
674*4882a593Smuzhiyun 		gatestat = fe->ops.i2c_gate_ctrl(fe, 1);
675*4882a593Smuzhiyun 	if (!gatestat)
676*4882a593Smuzhiyun 		stat = attach_init(state);
677*4882a593Smuzhiyun 	if (fe->ops.i2c_gate_ctrl && !gatestat)
678*4882a593Smuzhiyun 		fe->ops.i2c_gate_ctrl(fe, 0);
679*4882a593Smuzhiyun 	if (stat < 0) {
680*4882a593Smuzhiyun 		kfree(state);
681*4882a593Smuzhiyun 		return NULL;
682*4882a593Smuzhiyun 	}
683*4882a593Smuzhiyun 	fe->tuner_priv = state;
684*4882a593Smuzhiyun 	return fe;
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(stv6111_attach);
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun MODULE_DESCRIPTION("ST STV6111 satellite tuner driver");
689*4882a593Smuzhiyun MODULE_AUTHOR("Ralph Metzler, Manfred Voelkel");
690*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
691