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/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/gdb/python/gdb/
H A DFrameDecorator.py61 self._base = base
80 if hasattr(self._base, "elided"):
81 return self._base.elided()
97 if not isinstance(self._base, gdb.Frame):
98 if hasattr(self._base, "function"):
101 return self._base.function()
125 if hasattr(self._base, "address"):
126 return self._base.address()
136 if hasattr(self._base, "filename"):
137 return self._base.filename()
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/gdb/python/gdb/
H A DFrameDecorator.py61 self._base = base
80 if hasattr(self._base, "elided"):
81 return self._base.elided()
97 if not isinstance(self._base, gdb.Frame):
98 if hasattr(self._base, "function"):
101 return self._base.function()
125 if hasattr(self._base, "address"):
126 return self._base.address()
136 if hasattr(self._base, "filename"):
137 return self._base.filename()
[all …]
/OK3568_Linux_fs/kernel/drivers/tty/serial/8250/
H A DMakefile6 obj-$(CONFIG_SERIAL_8250) += 8250.o 8250_base.o
9 8250_base-y := 8250_port.o
10 8250_base-$(CONFIG_SERIAL_8250_DMA) += 8250_dma.o
11 8250_base-$(CONFIG_SERIAL_8250_DWLIB) += 8250_dwlib.o
12 8250_base-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o
H A D8250_fourport.c12 #define SERIAL8250_FOURPORT(_base, _irq) \ argument
13 SERIAL8250_PORT_FLAGS(_base, _irq, UPF_FOURPORT)
H A D8250.h103 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ argument
105 .iobase = _base, \
112 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) argument
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_catalog.c329 #define SSPP_BLK(_name, _id, _base, _features, \ argument
333 .base = _base, .len = 0x1c8, \
389 #define LM_BLK(_name, _id, _base, _fmask, _sblk, _pp, _lmpair, _dspp) \ argument
392 .base = _base, .len = 0x320, \
457 #define DSPP_BLK(_name, _id, _base) \ argument
460 .base = _base, .len = 0x1800, \
484 #define PP_BLK_TE(_name, _id, _base) \ argument
487 .base = _base, .len = 0xd4, \
491 #define PP_BLK(_name, _id, _base) \ argument
494 .base = _base, .len = 0xd4, \
[all …]
/OK3568_Linux_fs/kernel/arch/xtensa/platforms/xt2000/
H A Dsetup.c93 #define _SERIAL_PORT(_base,_irq) \ argument
95 .mapbase = (_base), \
96 .membase = (void*)(_base), \
/OK3568_Linux_fs/kernel/arch/mips/jazz/
H A Dsetup.c98 #define MEMPORT(_base, _irq) \ argument
100 .mapbase = (_base), \
101 .membase = (void *)(_base), \
/OK3568_Linux_fs/kernel/drivers/clk/baikal-t1/
H A Dclk-ccu-div.c57 #define CCU_DIV_VAR_INFO(_id, _name, _pname, _base, _width, _flags, _features) \ argument
62 .base = _base, \
69 #define CCU_DIV_GATE_INFO(_id, _name, _pname, _base, _divider) \ argument
74 .base = _base, \
79 #define CCU_DIV_BUF_INFO(_id, _name, _pname, _base, _flags) \ argument
84 .base = _base, \
H A Dclk-ccu-pll.c34 #define CCU_PLL_INFO(_id, _name, _pname, _base, _flags) \ argument
39 .base = _base, \
/OK3568_Linux_fs/kernel/arch/mips/alchemy/common/
H A Dplatform.c51 #define PORT(_base, _irq) \ argument
53 .mapbase = _base, \
282 #define MAC_RES(_base, _enable, _irq, _macdma) \ argument
284 .start = _base, \
285 .end = _base + 0xffff, \
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/adreno/
H A Da6xx_gpu_state.h123 #define CLUSTER_DBGAHB(_id, _base, _type, _reg) \ argument
124 { .name = #_id, .statetype = _type, .base = _base, \
172 #define HLSQ_DBG_REGS(_base, _type, _array) \ argument
173 { .val0 = _base, .val1 = _type, .registers = _array, \
/OK3568_Linux_fs/kernel/arch/arm/mach-ep93xx/
H A Ddma.c29 #define DMA_CHANNEL(_name, _base, _irq) \ argument
30 { .name = (_name), .base = (_base), .irq = (_irq) }
/OK3568_Linux_fs/kernel/arch/arm/mach-rockchip/
H A Drkpm_helpers.h50 #define REG_REGION(_start, _end, _stride, _base, _wmsk) \ argument
55 .base = (_base),
/OK3568_Linux_fs/kernel/drivers/net/ethernet/intel/igc/
H A Digc_i225.c60 if (hw->dev_spec._base.clear_semaphore_once) { in igc_get_hw_semaphore_i225()
61 hw->dev_spec._base.clear_semaphore_once = false; in igc_get_hw_semaphore_i225()
516 if (hw->dev_spec._base.eee_enable) { in igc_set_eee_i225()
574 if (hw->dev_spec._base.eee_enable && in igc_set_ltr_i225()
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/include/c++/10.3.1/
H A Dcodecvt141 _GLIBCXX_CODECVT_SPECIALIZATION2(__ ## _NAME ## _base, _ELEM); \
144 : public __ ## _NAME ## _base<_ELEM> \
149 : __ ## _NAME ## _base<_ELEM>(std::min(_Maxcode, 0x10fffful), \
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/include/c++/10.3.1/
H A Dcodecvt141 _GLIBCXX_CODECVT_SPECIALIZATION2(__ ## _NAME ## _base, _ELEM); \
144 : public __ ## _NAME ## _base<_ELEM> \
149 : __ ## _NAME ## _base<_ELEM>(std::min(_Maxcode, 0x10fffful), \
/OK3568_Linux_fs/kernel/arch/mips/sni/
H A Da20r.c20 #define PORT(_base,_irq) \ argument
22 .iobase = _base, \
H A Dpcit.c22 #define PORT(_base,_irq) \ argument
24 .iobase = _base, \
H A Dpcimt.c70 #define PORT(_base,_irq) \ argument
72 .iobase = _base, \
H A Drm200.c27 #define MEMPORT(_base,_irq) \ argument
29 .mapbase = _base, \
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/dynamic-layers/meta-python/recipes-extended/mozjs/mozjs-78/
H A D0005-Fixup-compatibility-of-mozbuild-with-Python-3.10.patch23 .../tests/tools/third_party/html5lib/html5lib/_trie/_base.py | 2 +-
175 …ird_party/html5lib/html5lib/_trie/_base.py b/testing/web-platform/tests/tools/third_party/html5lib…
177 --- a/testing/web-platform/tests/tools/third_party/html5lib/html5lib/_trie/_base.py
178 +++ b/testing/web-platform/tests/tools/third_party/html5lib/html5lib/_trie/_base.py
/OK3568_Linux_fs/kernel/arch/powerpc/platforms/512x/
H A Dmpc512x_shared.c392 #define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \ argument
393 ((u32)(_base) + sizeof(struct mpc52xx_psc)))
/OK3568_Linux_fs/buildroot/package/sox/
H A D0001-uclibc.patch18 fp->_ptr = fp->_base;
/OK3568_Linux_fs/kernel/drivers/scsi/aic94xx/
H A Daic94xx_reg.c113 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
122 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\

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