1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Driver for 8250/16550-type serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2001 Russell King.
8 */
9
10 #include <linux/serial_8250.h>
11 #include <linux/serial_reg.h>
12 #include <linux/dmaengine.h>
13
14 #include "../serial_mctrl_gpio.h"
15
16 struct uart_8250_dma {
17 int (*tx_dma)(struct uart_8250_port *p);
18 int (*rx_dma)(struct uart_8250_port *p);
19
20 /* Filter function */
21 dma_filter_fn fn;
22 /* Parameter to the filter function */
23 void *rx_param;
24 void *tx_param;
25
26 struct dma_slave_config rxconf;
27 struct dma_slave_config txconf;
28
29 struct dma_chan *rxchan;
30 struct dma_chan *txchan;
31
32 /* Device address base for DMA operations */
33 phys_addr_t rx_dma_addr;
34 phys_addr_t tx_dma_addr;
35
36 /* DMA address of the buffer in memory */
37 dma_addr_t rx_addr;
38 dma_addr_t tx_addr;
39
40 dma_cookie_t rx_cookie;
41 dma_cookie_t tx_cookie;
42
43 void *rx_buf;
44
45 size_t rx_size;
46 size_t tx_size;
47
48 unsigned char tx_running;
49 unsigned char tx_err;
50 unsigned char rx_running;
51 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
52 size_t rx_index;
53 #endif
54 };
55
56 struct old_serial_port {
57 unsigned int uart;
58 unsigned int baud_base;
59 unsigned int port;
60 unsigned int irq;
61 upf_t flags;
62 unsigned char io_type;
63 unsigned char __iomem *iomem_base;
64 unsigned short iomem_reg_shift;
65 };
66
67 struct serial8250_config {
68 const char *name;
69 unsigned short fifo_size;
70 unsigned short tx_loadsz;
71 unsigned char fcr;
72 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
73 unsigned int flags;
74 };
75
76 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
77 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
78 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
79 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
80 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
81 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
82 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
83 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
84 #define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
85 #define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks:
86 * STOP PARITY EPAR SPAR WLEN5 WLEN6
87 */
88
89 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
90 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
91 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
92 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
93 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
94 #define UART_BUG_TXRACE (1 << 5) /* UART Tx fails to set remote DR */
95
96
97 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
98 #define SERIAL8250_SHARE_IRQS 1
99 #else
100 #define SERIAL8250_SHARE_IRQS 0
101 #endif
102
103 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
104 { \
105 .iobase = _base, \
106 .irq = _irq, \
107 .uartclk = 1843200, \
108 .iotype = UPIO_PORT, \
109 .flags = UPF_BOOT_AUTOCONF | (_flags), \
110 }
111
112 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
113
114
serial_in(struct uart_8250_port * up,int offset)115 static inline int serial_in(struct uart_8250_port *up, int offset)
116 {
117 return up->port.serial_in(&up->port, offset);
118 }
119
serial_out(struct uart_8250_port * up,int offset,int value)120 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
121 {
122 up->port.serial_out(&up->port, offset, value);
123 }
124
125 /*
126 * For the 16C950
127 */
serial_icr_write(struct uart_8250_port * up,int offset,int value)128 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
129 {
130 serial_out(up, UART_SCR, offset);
131 serial_out(up, UART_ICR, value);
132 }
133
serial_icr_read(struct uart_8250_port * up,int offset)134 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
135 int offset)
136 {
137 unsigned int value;
138
139 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
140 serial_out(up, UART_SCR, offset);
141 value = serial_in(up, UART_ICR);
142 serial_icr_write(up, UART_ACR, up->acr);
143
144 return value;
145 }
146
147 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
148
serial_dl_read(struct uart_8250_port * up)149 static inline int serial_dl_read(struct uart_8250_port *up)
150 {
151 return up->dl_read(up);
152 }
153
serial_dl_write(struct uart_8250_port * up,int value)154 static inline void serial_dl_write(struct uart_8250_port *up, int value)
155 {
156 up->dl_write(up, value);
157 }
158
serial8250_set_THRI(struct uart_8250_port * up)159 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
160 {
161 if (up->ier & UART_IER_THRI)
162 return false;
163 up->ier |= UART_IER_THRI;
164 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
165 up->ier |= UART_IER_PTIME;
166 #endif
167 serial_out(up, UART_IER, up->ier);
168 return true;
169 }
170
serial8250_clear_THRI(struct uart_8250_port * up)171 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
172 {
173 if (!(up->ier & UART_IER_THRI))
174 return false;
175 up->ier &= ~UART_IER_THRI;
176 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
177 up->ier &= ~UART_IER_PTIME;
178 #endif
179 serial_out(up, UART_IER, up->ier);
180 return true;
181 }
182
183 struct uart_8250_port *serial8250_get_port(int line);
184
185 void serial8250_rpm_get(struct uart_8250_port *p);
186 void serial8250_rpm_put(struct uart_8250_port *p);
187
188 void serial8250_rpm_get_tx(struct uart_8250_port *p);
189 void serial8250_rpm_put_tx(struct uart_8250_port *p);
190
191 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
192 void serial8250_em485_start_tx(struct uart_8250_port *p);
193 void serial8250_em485_stop_tx(struct uart_8250_port *p);
194 void serial8250_em485_destroy(struct uart_8250_port *p);
195
196 /* MCR <-> TIOCM conversion */
serial8250_TIOCM_to_MCR(int tiocm)197 static inline int serial8250_TIOCM_to_MCR(int tiocm)
198 {
199 int mcr = 0;
200
201 if (tiocm & TIOCM_RTS)
202 mcr |= UART_MCR_RTS;
203 if (tiocm & TIOCM_DTR)
204 mcr |= UART_MCR_DTR;
205 if (tiocm & TIOCM_OUT1)
206 mcr |= UART_MCR_OUT1;
207 if (tiocm & TIOCM_OUT2)
208 mcr |= UART_MCR_OUT2;
209 if (tiocm & TIOCM_LOOP)
210 mcr |= UART_MCR_LOOP;
211
212 return mcr;
213 }
214
serial8250_MCR_to_TIOCM(int mcr)215 static inline int serial8250_MCR_to_TIOCM(int mcr)
216 {
217 int tiocm = 0;
218
219 if (mcr & UART_MCR_RTS)
220 tiocm |= TIOCM_RTS;
221 if (mcr & UART_MCR_DTR)
222 tiocm |= TIOCM_DTR;
223 if (mcr & UART_MCR_OUT1)
224 tiocm |= TIOCM_OUT1;
225 if (mcr & UART_MCR_OUT2)
226 tiocm |= TIOCM_OUT2;
227 if (mcr & UART_MCR_LOOP)
228 tiocm |= TIOCM_LOOP;
229
230 return tiocm;
231 }
232
233 /* MSR <-> TIOCM conversion */
serial8250_MSR_to_TIOCM(int msr)234 static inline int serial8250_MSR_to_TIOCM(int msr)
235 {
236 int tiocm = 0;
237
238 if (msr & UART_MSR_DCD)
239 tiocm |= TIOCM_CAR;
240 if (msr & UART_MSR_RI)
241 tiocm |= TIOCM_RNG;
242 if (msr & UART_MSR_DSR)
243 tiocm |= TIOCM_DSR;
244 if (msr & UART_MSR_CTS)
245 tiocm |= TIOCM_CTS;
246
247 return tiocm;
248 }
249
serial8250_out_MCR(struct uart_8250_port * up,int value)250 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
251 {
252 serial_out(up, UART_MCR, value);
253
254 if (up->gpios)
255 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
256 }
257
serial8250_in_MCR(struct uart_8250_port * up)258 static inline int serial8250_in_MCR(struct uart_8250_port *up)
259 {
260 int mctrl;
261
262 mctrl = serial_in(up, UART_MCR);
263
264 if (up->gpios) {
265 unsigned int mctrl_gpio = 0;
266
267 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
268 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
269 }
270
271 return mctrl;
272 }
273
274 #if defined(__alpha__) && !defined(CONFIG_PCI)
275 /*
276 * Digital did something really horribly wrong with the OUT1 and OUT2
277 * lines on at least some ALPHA's. The failure mode is that if either
278 * is cleared, the machine locks up with endless interrupts.
279 */
280 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
281 #else
282 #define ALPHA_KLUDGE_MCR 0
283 #endif
284
285 #ifdef CONFIG_SERIAL_8250_PNP
286 int serial8250_pnp_init(void);
287 void serial8250_pnp_exit(void);
288 #else
serial8250_pnp_init(void)289 static inline int serial8250_pnp_init(void) { return 0; }
serial8250_pnp_exit(void)290 static inline void serial8250_pnp_exit(void) { }
291 #endif
292
293 #ifdef CONFIG_SERIAL_8250_FINTEK
294 int fintek_8250_probe(struct uart_8250_port *uart);
295 #else
fintek_8250_probe(struct uart_8250_port * uart)296 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
297 #endif
298
299 #ifdef CONFIG_ARCH_OMAP1
is_omap1_8250(struct uart_8250_port * pt)300 static inline int is_omap1_8250(struct uart_8250_port *pt)
301 {
302 int res;
303
304 switch (pt->port.mapbase) {
305 case OMAP1_UART1_BASE:
306 case OMAP1_UART2_BASE:
307 case OMAP1_UART3_BASE:
308 res = 1;
309 break;
310 default:
311 res = 0;
312 break;
313 }
314
315 return res;
316 }
317
is_omap1510_8250(struct uart_8250_port * pt)318 static inline int is_omap1510_8250(struct uart_8250_port *pt)
319 {
320 if (!cpu_is_omap1510())
321 return 0;
322
323 return is_omap1_8250(pt);
324 }
325 #else
is_omap1_8250(struct uart_8250_port * pt)326 static inline int is_omap1_8250(struct uart_8250_port *pt)
327 {
328 return 0;
329 }
is_omap1510_8250(struct uart_8250_port * pt)330 static inline int is_omap1510_8250(struct uart_8250_port *pt)
331 {
332 return 0;
333 }
334 #endif
335
336 #ifdef CONFIG_SERIAL_8250_DMA
337 extern int serial8250_tx_dma(struct uart_8250_port *);
338 extern int serial8250_rx_dma(struct uart_8250_port *);
339 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
340 extern int serial8250_start_rx_dma(struct uart_8250_port *);
341 #endif
342 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
343 extern int serial8250_request_dma(struct uart_8250_port *);
344 extern void serial8250_release_dma(struct uart_8250_port *);
345 #else
serial8250_tx_dma(struct uart_8250_port * p)346 static inline int serial8250_tx_dma(struct uart_8250_port *p)
347 {
348 return -1;
349 }
serial8250_rx_dma(struct uart_8250_port * p)350 static inline int serial8250_rx_dma(struct uart_8250_port *p)
351 {
352 return -1;
353 }
354 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
serial8250_start_rx_dma(struct uart_8250_port * p)355 static inline int serial8250_start_rx_dma(struct uart_8250_port *p)
356 {
357 return -1;
358 }
359 #endif
serial8250_rx_dma_flush(struct uart_8250_port * p)360 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
serial8250_request_dma(struct uart_8250_port * p)361 static inline int serial8250_request_dma(struct uart_8250_port *p)
362 {
363 return -1;
364 }
serial8250_release_dma(struct uart_8250_port * p)365 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
366 #endif
367
ns16550a_goto_highspeed(struct uart_8250_port * up)368 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
369 {
370 unsigned char status;
371
372 status = serial_in(up, 0x04); /* EXCR2 */
373 #define PRESL(x) ((x) & 0x30)
374 if (PRESL(status) == 0x10) {
375 /* already in high speed mode */
376 return 0;
377 } else {
378 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
379 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
380 serial_out(up, 0x04, status);
381 }
382 return 1;
383 }
384
serial_index(struct uart_port * port)385 static inline int serial_index(struct uart_port *port)
386 {
387 return port->minor - 64;
388 }
389