Searched refs:MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK (Results 1 – 15 of 15) sorted by relevance
211 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
328 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
433 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
415 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
278 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x0f8 0x40c 0x810 0x2 0x0 macro
412 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x1b0b1
339 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x13c 0x50c 0x7f4 0x2 0x2 macro
378 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
362 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
430 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
681 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
432 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
545 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
282 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x0f8 0x40c 0x810 0x2 0x0 macro
343 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x13c 0x50c 0x7f4 0x2 0x2 macro