1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com> 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 5*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 6*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 7*4882a593Smuzhiyun * whole. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 10*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License 11*4882a593Smuzhiyun * version 2 as published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 14*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 15*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16*4882a593Smuzhiyun * GNU General Public License for more details. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * Or, alternatively, 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 21*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 22*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 23*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 24*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 25*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 26*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 27*4882a593Smuzhiyun * conditions: 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 30*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 31*4882a593Smuzhiyun * 32*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 33*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 34*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 35*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 36*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 37*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 38*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 39*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun#include <dt-bindings/sound/fsl-imx-audmux.h> 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun/ { 44*4882a593Smuzhiyun /* Will be filled by the bootloader */ 45*4882a593Smuzhiyun memory@10000000 { 46*4882a593Smuzhiyun device_type = "memory"; 47*4882a593Smuzhiyun reg = <0x10000000 0>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun chosen { 51*4882a593Smuzhiyun stdout-path = &uart1; 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun ir_recv: ir-receiver { 55*4882a593Smuzhiyun compatible = "gpio-ir-receiver"; 56*4882a593Smuzhiyun gpios = <&gpio7 9 GPIO_ACTIVE_LOW>; 57*4882a593Smuzhiyun pinctrl-names = "default"; 58*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>; 59*4882a593Smuzhiyun linux,rc-map-name = "rc-rc6-mce"; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun v_3v2: regulator-v-3v2 { 63*4882a593Smuzhiyun compatible = "regulator-fixed"; 64*4882a593Smuzhiyun regulator-always-on; 65*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 66*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 67*4882a593Smuzhiyun regulator-name = "v_3v2"; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun v_5v0: regulator-v-5v0 { 71*4882a593Smuzhiyun compatible = "regulator-fixed"; 72*4882a593Smuzhiyun regulator-always-on; 73*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 74*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 75*4882a593Smuzhiyun regulator-name = "v_5v0"; 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun vcc_1p8: regulator-vcc-1p8 { 79*4882a593Smuzhiyun compatible = "regulator-fixed"; 80*4882a593Smuzhiyun regulator-always-on; 81*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 82*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 83*4882a593Smuzhiyun regulator-name = "vcc_1p8"; 84*4882a593Smuzhiyun vin-supply = <&v_3v2>; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun v_sd: regulator-v-sd { 88*4882a593Smuzhiyun compatible = "regulator-fixed"; 89*4882a593Smuzhiyun gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>; 90*4882a593Smuzhiyun pinctrl-names = "default"; 91*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_vmmc>; 92*4882a593Smuzhiyun regulator-boot-on; 93*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 94*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 95*4882a593Smuzhiyun regulator-name = "v_sd"; 96*4882a593Smuzhiyun startup-delay-us = <1000>; 97*4882a593Smuzhiyun vin-supply = <&v_3v2>; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun v_usb1: regulator-v-usb1 { 101*4882a593Smuzhiyun compatible = "regulator-fixed"; 102*4882a593Smuzhiyun enable-active-high; 103*4882a593Smuzhiyun gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 104*4882a593Smuzhiyun pinctrl-names = "default"; 105*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>; 106*4882a593Smuzhiyun regulator-always-on; 107*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 108*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 109*4882a593Smuzhiyun regulator-name = "v_usb1"; 110*4882a593Smuzhiyun vin-supply = <&v_5v0>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun v_usb2: regulator-v-usb2 { 114*4882a593Smuzhiyun /* USB hub port 1 */ 115*4882a593Smuzhiyun compatible = "regulator-fixed"; 116*4882a593Smuzhiyun enable-active-high; 117*4882a593Smuzhiyun gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 118*4882a593Smuzhiyun pinctrl-names = "default"; 119*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>; 120*4882a593Smuzhiyun regulator-always-on; 121*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 122*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 123*4882a593Smuzhiyun regulator-name = "v_usb2"; 124*4882a593Smuzhiyun vin-supply = <&v_5v0>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun v_usb3: regulator-v-usb3 { 128*4882a593Smuzhiyun /* USB hub port 3 */ 129*4882a593Smuzhiyun compatible = "regulator-fixed"; 130*4882a593Smuzhiyun enable-active-high; 131*4882a593Smuzhiyun gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; 132*4882a593Smuzhiyun pinctrl-names = "default"; 133*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>; 134*4882a593Smuzhiyun regulator-always-on; 135*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 136*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 137*4882a593Smuzhiyun regulator-name = "v_usb3"; 138*4882a593Smuzhiyun vin-supply = <&v_5v0>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun v_usb4: regulator-v-usb4 { 142*4882a593Smuzhiyun /* USB hub port 4 */ 143*4882a593Smuzhiyun compatible = "regulator-fixed"; 144*4882a593Smuzhiyun enable-active-high; 145*4882a593Smuzhiyun gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>; 146*4882a593Smuzhiyun pinctrl-names = "default"; 147*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>; 148*4882a593Smuzhiyun regulator-always-on; 149*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 150*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 151*4882a593Smuzhiyun regulator-name = "v_usb4"; 152*4882a593Smuzhiyun vin-supply = <&v_5v0>; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun audio: sound-sgtl5000 { 156*4882a593Smuzhiyun compatible = "simple-audio-card"; 157*4882a593Smuzhiyun simple-audio-card,name = "On-board Codec"; 158*4882a593Smuzhiyun simple-audio-card,format = "i2s"; 159*4882a593Smuzhiyun simple-audio-card,bitclock-master = <&sound_codec>; 160*4882a593Smuzhiyun simple-audio-card,frame-master = <&sound_codec>; 161*4882a593Smuzhiyun simple-audio-card,widgets = 162*4882a593Smuzhiyun "Microphone", "Mic Jack", 163*4882a593Smuzhiyun "Headphone", "Headphone Jack"; 164*4882a593Smuzhiyun simple-audio-card,routing = 165*4882a593Smuzhiyun "MIC_IN", "Mic Jack", 166*4882a593Smuzhiyun "Mic Jack", "Mic Bias", 167*4882a593Smuzhiyun "Headphone Jack", "HP_OUT"; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun sound_cpu: simple-audio-card,cpu { 170*4882a593Smuzhiyun sound-dai = <&ssi1>; 171*4882a593Smuzhiyun }; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun sound_codec: simple-audio-card,codec { 174*4882a593Smuzhiyun sound-dai = <&sgtl5000>; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&audmux { 180*4882a593Smuzhiyun status = "okay"; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun ssi1 { 183*4882a593Smuzhiyun fsl,audmux-port = <0>; 184*4882a593Smuzhiyun fsl,port-config = < 185*4882a593Smuzhiyun (IMX_AUDMUX_V2_PTCR_SYN | 186*4882a593Smuzhiyun IMX_AUDMUX_V2_PTCR_TFSEL(4) | 187*4882a593Smuzhiyun IMX_AUDMUX_V2_PTCR_TCSEL(4) | 188*4882a593Smuzhiyun IMX_AUDMUX_V2_PTCR_TFSDIR | 189*4882a593Smuzhiyun IMX_AUDMUX_V2_PTCR_TCLKDIR) 190*4882a593Smuzhiyun IMX_AUDMUX_V2_PDCR_RXDSEL(4) 191*4882a593Smuzhiyun >; 192*4882a593Smuzhiyun }; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun pins5 { 195*4882a593Smuzhiyun fsl,audmux-port = <4>; 196*4882a593Smuzhiyun fsl,port-config = < 197*4882a593Smuzhiyun IMX_AUDMUX_V2_PTCR_SYN 198*4882a593Smuzhiyun IMX_AUDMUX_V2_PDCR_RXDSEL(0) 199*4882a593Smuzhiyun >; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun}; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun&ecspi2 { 204*4882a593Smuzhiyun pinctrl-names = "default"; 205*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>; 206*4882a593Smuzhiyun cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; 207*4882a593Smuzhiyun status = "okay"; 208*4882a593Smuzhiyun}; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun&hdmi { 211*4882a593Smuzhiyun pinctrl-names = "default"; 212*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_hdmi>; 213*4882a593Smuzhiyun ddc-i2c-bus = <&i2c2>; 214*4882a593Smuzhiyun status = "okay"; 215*4882a593Smuzhiyun}; 216*4882a593Smuzhiyun 217*4882a593Smuzhiyun&i2c1 { 218*4882a593Smuzhiyun clock-frequency = <100000>; 219*4882a593Smuzhiyun pinctrl-names = "default"; 220*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_i2c1>; 221*4882a593Smuzhiyun status = "okay"; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun pcf8523: rtc@68 { 224*4882a593Smuzhiyun compatible = "nxp,pcf8523"; 225*4882a593Smuzhiyun reg = <0x68>; 226*4882a593Smuzhiyun }; 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun sgtl5000: codec@a { 229*4882a593Smuzhiyun clocks = <&clks IMX6QDL_CLK_CKO>; 230*4882a593Smuzhiyun compatible = "fsl,sgtl5000"; 231*4882a593Smuzhiyun #sound-dai-cells = <0>; 232*4882a593Smuzhiyun pinctrl-names = "default"; 233*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>; 234*4882a593Smuzhiyun reg = <0x0a>; 235*4882a593Smuzhiyun VDDA-supply = <&v_3v2>; 236*4882a593Smuzhiyun VDDD-supply = <&vcc_1p8>; 237*4882a593Smuzhiyun VDDIO-supply = <&v_3v2>; 238*4882a593Smuzhiyun }; 239*4882a593Smuzhiyun}; 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun&i2c2 { 242*4882a593Smuzhiyun clock-frequency = <100000>; 243*4882a593Smuzhiyun pinctrl-names = "default"; 244*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_i2c2>; 245*4882a593Smuzhiyun status = "okay"; 246*4882a593Smuzhiyun}; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun&i2c3 { 249*4882a593Smuzhiyun clock-frequency = <100000>; 250*4882a593Smuzhiyun pinctrl-names = "default"; 251*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_i2c3>; 252*4882a593Smuzhiyun status = "okay"; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&iomuxc { 256*4882a593Smuzhiyun pinctrl-names = "default"; 257*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hog>; 258*4882a593Smuzhiyun 259*4882a593Smuzhiyun hummingboard2 { 260*4882a593Smuzhiyun pinctrl_hog: hoggrp { 261*4882a593Smuzhiyun fsl,pins = < 262*4882a593Smuzhiyun /* 263*4882a593Smuzhiyun * 36 pin headers GPIO description. The pins 264*4882a593Smuzhiyun * numbering as following - 265*4882a593Smuzhiyun * 266*4882a593Smuzhiyun * 3.2v 5v 74 75 267*4882a593Smuzhiyun * 73 72 71 70 268*4882a593Smuzhiyun * 69 68 67 66 269*4882a593Smuzhiyun * 270*4882a593Smuzhiyun * 77 78 79 76 271*4882a593Smuzhiyun * 65 64 61 60 272*4882a593Smuzhiyun * 53 52 51 50 273*4882a593Smuzhiyun * 49 48 166 132 274*4882a593Smuzhiyun * 95 94 90 91 275*4882a593Smuzhiyun * GND 54 24 204 276*4882a593Smuzhiyun * 277*4882a593Smuzhiyun * The GPIO numbers can be extracted using 278*4882a593Smuzhiyun * signal name from below. 279*4882a593Smuzhiyun * Example - 280*4882a593Smuzhiyun * MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is 281*4882a593Smuzhiyun * GPIO(3,10) which is (3-1)*32+10 = gpio 74 282*4882a593Smuzhiyun * 283*4882a593Smuzhiyun * i.e. The mapping of GPIO(X,Y) to Linux gpio 284*4882a593Smuzhiyun * number is : gpio number = (X-1) * 32 + Y 285*4882a593Smuzhiyun */ 286*4882a593Smuzhiyun /* DI1_PIN15 */ 287*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1 288*4882a593Smuzhiyun /* DI1_PIN02 */ 289*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1 290*4882a593Smuzhiyun /* DISP1_DATA00 */ 291*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1 292*4882a593Smuzhiyun /* DISP1_DATA01 */ 293*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1 294*4882a593Smuzhiyun /* DISP1_DATA02 */ 295*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1 296*4882a593Smuzhiyun /* DISP1_DATA03 */ 297*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1 298*4882a593Smuzhiyun /* DISP1_DATA04 */ 299*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1 300*4882a593Smuzhiyun /* DISP1_DATA05 */ 301*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1 302*4882a593Smuzhiyun /* DISP1_DATA06 */ 303*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1 304*4882a593Smuzhiyun /* DISP1_DATA07 */ 305*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1 306*4882a593Smuzhiyun /* DI1_D0_CS */ 307*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1 308*4882a593Smuzhiyun /* DI1_D1_CS */ 309*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1 310*4882a593Smuzhiyun /* DI1_PIN01 */ 311*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1 312*4882a593Smuzhiyun /* DI1_PIN03 */ 313*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1 314*4882a593Smuzhiyun /* DISP1_DATA08 */ 315*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1 316*4882a593Smuzhiyun /* DISP1_DATA09 */ 317*4882a593Smuzhiyun MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1 318*4882a593Smuzhiyun /* DISP1_DATA10 */ 319*4882a593Smuzhiyun MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1 320*4882a593Smuzhiyun /* DISP1_DATA11 */ 321*4882a593Smuzhiyun MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1 322*4882a593Smuzhiyun /* DISP1_DATA12 */ 323*4882a593Smuzhiyun MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1 324*4882a593Smuzhiyun /* DISP1_DATA13 */ 325*4882a593Smuzhiyun MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1 326*4882a593Smuzhiyun /* DISP1_DATA14 */ 327*4882a593Smuzhiyun MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1 328*4882a593Smuzhiyun /* DISP1_DATA15 */ 329*4882a593Smuzhiyun MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1 330*4882a593Smuzhiyun /* DISP1_DATA16 */ 331*4882a593Smuzhiyun MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1 332*4882a593Smuzhiyun /* DISP1_DATA17 */ 333*4882a593Smuzhiyun MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1 334*4882a593Smuzhiyun /* DISP1_DATA18 */ 335*4882a593Smuzhiyun MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1 336*4882a593Smuzhiyun /* DISP1_DATA19 */ 337*4882a593Smuzhiyun MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1 338*4882a593Smuzhiyun /* DISP1_DATA20 */ 339*4882a593Smuzhiyun MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1 340*4882a593Smuzhiyun /* DISP1_DATA21 */ 341*4882a593Smuzhiyun MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1 342*4882a593Smuzhiyun /* DISP1_DATA22 */ 343*4882a593Smuzhiyun MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1 344*4882a593Smuzhiyun /* DISP1_DATA23 */ 345*4882a593Smuzhiyun MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1 346*4882a593Smuzhiyun /* DI1_DISP_CLK */ 347*4882a593Smuzhiyun MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1 348*4882a593Smuzhiyun /* SPDIF_IN */ 349*4882a593Smuzhiyun MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1 350*4882a593Smuzhiyun /* SPDIF_OUT */ 351*4882a593Smuzhiyun MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1 352*4882a593Smuzhiyun 353*4882a593Smuzhiyun /* MikroBUS GPIO pin number 10 */ 354*4882a593Smuzhiyun MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1 355*4882a593Smuzhiyun >; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun 358*4882a593Smuzhiyun pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp { 359*4882a593Smuzhiyun fsl,pins = < 360*4882a593Smuzhiyun MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 361*4882a593Smuzhiyun MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 362*4882a593Smuzhiyun MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 363*4882a593Smuzhiyun MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */ 364*4882a593Smuzhiyun >; 365*4882a593Smuzhiyun }; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 { 368*4882a593Smuzhiyun fsl,pins = < 369*4882a593Smuzhiyun MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000 370*4882a593Smuzhiyun >; 371*4882a593Smuzhiyun }; 372*4882a593Smuzhiyun 373*4882a593Smuzhiyun pinctrl_hummingboard2_hdmi: hummingboard2-hdmi { 374*4882a593Smuzhiyun fsl,pins = < 375*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 376*4882a593Smuzhiyun >; 377*4882a593Smuzhiyun }; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 { 380*4882a593Smuzhiyun fsl,pins = < 381*4882a593Smuzhiyun MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 382*4882a593Smuzhiyun MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 383*4882a593Smuzhiyun >; 384*4882a593Smuzhiyun }; 385*4882a593Smuzhiyun 386*4882a593Smuzhiyun pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 { 387*4882a593Smuzhiyun fsl,pins = < 388*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 389*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 390*4882a593Smuzhiyun >; 391*4882a593Smuzhiyun }; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 { 394*4882a593Smuzhiyun fsl,pins = < 395*4882a593Smuzhiyun MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 396*4882a593Smuzhiyun MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 397*4882a593Smuzhiyun >; 398*4882a593Smuzhiyun }; 399*4882a593Smuzhiyun 400*4882a593Smuzhiyun pinctrl_hummingboard2_mipi: hummingboard2_mipi { 401*4882a593Smuzhiyun fsl,pins = < 402*4882a593Smuzhiyun MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1 403*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1 404*4882a593Smuzhiyun MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 405*4882a593Smuzhiyun >; 406*4882a593Smuzhiyun }; 407*4882a593Smuzhiyun 408*4882a593Smuzhiyun pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset { 409*4882a593Smuzhiyun fsl,pins = < 410*4882a593Smuzhiyun MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1 411*4882a593Smuzhiyun >; 412*4882a593Smuzhiyun }; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun pinctrl_hummingboard2_pwm1: pwm1grp { 415*4882a593Smuzhiyun fsl,pins = < 416*4882a593Smuzhiyun MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1 417*4882a593Smuzhiyun >; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun pinctrl_hummingboard2_pwm3: pwm3grp { 421*4882a593Smuzhiyun fsl,pins = < 422*4882a593Smuzhiyun MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 423*4882a593Smuzhiyun >; 424*4882a593Smuzhiyun }; 425*4882a593Smuzhiyun 426*4882a593Smuzhiyun pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 { 427*4882a593Smuzhiyun fsl,pins = < 428*4882a593Smuzhiyun MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 429*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 430*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0 431*4882a593Smuzhiyun MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 432*4882a593Smuzhiyun MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0 433*4882a593Smuzhiyun >; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus { 437*4882a593Smuzhiyun fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus { 441*4882a593Smuzhiyun fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>; 442*4882a593Smuzhiyun }; 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus { 445*4882a593Smuzhiyun fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>; 446*4882a593Smuzhiyun }; 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id { 449*4882a593Smuzhiyun /* 450*4882a593Smuzhiyun * We want it pulled down for a fixed host connection. 451*4882a593Smuzhiyun */ 452*4882a593Smuzhiyun fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>; 453*4882a593Smuzhiyun }; 454*4882a593Smuzhiyun 455*4882a593Smuzhiyun pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus { 456*4882a593Smuzhiyun fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>; 457*4882a593Smuzhiyun }; 458*4882a593Smuzhiyun 459*4882a593Smuzhiyun pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux { 460*4882a593Smuzhiyun fsl,pins = < 461*4882a593Smuzhiyun MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071 462*4882a593Smuzhiyun MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071 463*4882a593Smuzhiyun >; 464*4882a593Smuzhiyun }; 465*4882a593Smuzhiyun 466*4882a593Smuzhiyun pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 { 467*4882a593Smuzhiyun fsl,pins = < 468*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 469*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 470*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 471*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 472*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 473*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 474*4882a593Smuzhiyun >; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz { 478*4882a593Smuzhiyun fsl,pins = < 479*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9 480*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9 481*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 482*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 483*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 484*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9 485*4882a593Smuzhiyun >; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz { 489*4882a593Smuzhiyun fsl,pins = < 490*4882a593Smuzhiyun MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9 491*4882a593Smuzhiyun MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9 492*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 493*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 494*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 495*4882a593Smuzhiyun MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9 496*4882a593Smuzhiyun >; 497*4882a593Smuzhiyun }; 498*4882a593Smuzhiyun 499*4882a593Smuzhiyun pinctrl_hummingboard2_vmmc: hummingboard2-vmmc { 500*4882a593Smuzhiyun fsl,pins = < 501*4882a593Smuzhiyun MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0 502*4882a593Smuzhiyun >; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun 505*4882a593Smuzhiyun pinctrl_hummingboard2_uart3: hummingboard2-uart3 { 506*4882a593Smuzhiyun fsl,pins = < 507*4882a593Smuzhiyun MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1 508*4882a593Smuzhiyun MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000 509*4882a593Smuzhiyun >; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun }; 512*4882a593Smuzhiyun}; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun&pcie { 515*4882a593Smuzhiyun pinctrl-names = "default"; 516*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>; 517*4882a593Smuzhiyun reset-gpio = <&gpio2 11 GPIO_ACTIVE_LOW>; 518*4882a593Smuzhiyun status = "okay"; 519*4882a593Smuzhiyun}; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun&pwm1 { 522*4882a593Smuzhiyun pinctrl-names = "default"; 523*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_pwm1>; 524*4882a593Smuzhiyun status = "okay"; 525*4882a593Smuzhiyun}; 526*4882a593Smuzhiyun 527*4882a593Smuzhiyun&pwm3 { 528*4882a593Smuzhiyun pinctrl-names = "default"; 529*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_pwm3>; 530*4882a593Smuzhiyun status = "okay"; 531*4882a593Smuzhiyun}; 532*4882a593Smuzhiyun 533*4882a593Smuzhiyun&ssi1 { 534*4882a593Smuzhiyun status = "okay"; 535*4882a593Smuzhiyun}; 536*4882a593Smuzhiyun 537*4882a593Smuzhiyun&usbh1 { 538*4882a593Smuzhiyun disable-over-current; 539*4882a593Smuzhiyun status = "okay"; 540*4882a593Smuzhiyun}; 541*4882a593Smuzhiyun 542*4882a593Smuzhiyun&usbotg { 543*4882a593Smuzhiyun disable-over-current; 544*4882a593Smuzhiyun pinctrl-names = "default"; 545*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>; 546*4882a593Smuzhiyun vbus-supply = <&v_usb1>; 547*4882a593Smuzhiyun status = "okay"; 548*4882a593Smuzhiyun}; 549*4882a593Smuzhiyun 550*4882a593Smuzhiyun&usdhc2 { 551*4882a593Smuzhiyun pinctrl-names = "default", "state_100mhz", "state_200mhz"; 552*4882a593Smuzhiyun pinctrl-0 = < 553*4882a593Smuzhiyun &pinctrl_hummingboard2_usdhc2_aux 554*4882a593Smuzhiyun &pinctrl_hummingboard2_usdhc2 555*4882a593Smuzhiyun >; 556*4882a593Smuzhiyun pinctrl-1 = < 557*4882a593Smuzhiyun &pinctrl_hummingboard2_usdhc2_aux 558*4882a593Smuzhiyun &pinctrl_hummingboard2_usdhc2_100mhz 559*4882a593Smuzhiyun >; 560*4882a593Smuzhiyun pinctrl-2 = < 561*4882a593Smuzhiyun &pinctrl_hummingboard2_usdhc2_aux 562*4882a593Smuzhiyun &pinctrl_hummingboard2_usdhc2_200mhz 563*4882a593Smuzhiyun >; 564*4882a593Smuzhiyun vmmc-supply = <&v_sd>; 565*4882a593Smuzhiyun cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 566*4882a593Smuzhiyun status = "okay"; 567*4882a593Smuzhiyun}; 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun&uart3 { 570*4882a593Smuzhiyun pinctrl-names = "default"; 571*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_hummingboard2_uart3>; 572*4882a593Smuzhiyun status = "okay"; 573*4882a593Smuzhiyun}; 574*4882a593Smuzhiyun 575*4882a593Smuzhiyun&vcc_3v3 { 576*4882a593Smuzhiyun vin-supply = <&v_3v2>; 577*4882a593Smuzhiyun}; 578