Searched refs:IMX6UL_CLK_ENET_REF (Results 1 – 11 of 11) sorted by relevance
43 clocks = <&clks IMX6UL_CLK_ENET_REF>;
56 clocks = <&clks IMX6UL_CLK_ENET_REF>;
54 clocks = <&clks IMX6UL_CLK_ENET_REF>;
123 clocks = <&clks IMX6UL_CLK_ENET_REF>;
174 clocks = <&clks IMX6UL_CLK_ENET_REF>;
880 <&clks IMX6UL_CLK_ENET_REF>,881 <&clks IMX6UL_CLK_ENET_REF>;
57 #define IMX6UL_CLK_ENET_REF 44 macro
53 #define IMX6UL_CLK_ENET_REF 44 macro
208 hws[IMX6UL_CLK_ENET_REF] = clk_hw_register_divider_table(NULL, "enet_ref", "pll6_enet", 0, in imx6ul_clocks_init()494 clk_set_rate(hws[IMX6UL_CLK_ENET_REF]->clk, 50000000); in imx6ul_clocks_init()
774 <&clks IMX6UL_CLK_ENET_REF>,775 <&clks IMX6UL_CLK_ENET_REF>;
874 <&clks IMX6UL_CLK_ENET_REF>,875 <&clks IMX6UL_CLK_ENET_REF>;