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Searched refs:GCC_PCIE_0_PHY_BCR (Results 1 – 17 of 17) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/reset/
H A Dqcom,gcc-apq8084.h91 #define GCC_PCIE_0_PHY_BCR 82 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dqcom,gcc-qcs404.h166 #define GCC_PCIE_0_PHY_BCR 10 macro
H A Dqcom,gcc-sm8150.h218 #define GCC_PCIE_0_PHY_BCR 5 macro
H A Dqcom,gcc-sdm845.h228 #define GCC_PCIE_0_PHY_BCR 24 macro
H A Dqcom,gcc-sm8250.h219 #define GCC_PCIE_0_PHY_BCR 7 macro
H A Dqcom,gcc-msm8998.h268 #define GCC_PCIE_0_PHY_BCR 76 macro
H A Dqcom,gcc-msm8996.h320 #define GCC_PCIE_0_PHY_BCR 80 macro
/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A Dgcc-qcs404.c2795 [GCC_PCIE_0_PHY_BCR] = { 0x3e004 },
H A Dgcc-msm8998.c3034 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
H A Dgcc-sdm845.c3536 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
H A Dgcc-msm8996.c3579 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
H A Dgcc-apq8084.c3563 [GCC_PCIE_0_PHY_BCR] = { 0x1b00 },
H A Dgcc-sm8250.c3545 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
H A Dgcc-sm8150.c3690 [GCC_PCIE_0_PHY_BCR] = { 0x6c01c },
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dmsm8998.dtsi981 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
H A Dmsm8996.dtsi375 resets = <&gcc GCC_PCIE_0_PHY_BCR>;
H A Dsdm845.dtsi1887 resets = <&gcc GCC_PCIE_0_PHY_BCR>;