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Searched refs:CLK_TOP_APLL_SEL (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8135-clk.h102 #define CLK_TOP_APLL_SEL 91 macro
H A Dmt2712-clk.h170 #define CLK_TOP_APLL_SEL 139 macro
H A Dmt2701-clk.h107 #define CLK_TOP_APLL_SEL 96 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8135.c393 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel", apll_parents, 0x0168, 16, 3, 23),
H A Dclk-mt2701.c537 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel", apll_parents,
H A Dclk-mt2712.c828 MUX_GATE(CLK_TOP_APLL_SEL, "apll_sel",