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/OK3568_Linux_fs/kernel/arch/arm/net/
H A Dbpf_jit_32.h162 #define _AL3_R(op, rd, rn, rm) ((op ## _R) | (rd) << 12 | (rn) << 16 | (rm)) argument
164 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument
168 #define ARM_ADD_R(rd, rn, rm) _AL3_R(ARM_INST_ADD, rd, rn, rm) argument
169 #define ARM_ADDS_R(rd, rn, rm) _AL3_R(ARM_INST_ADDS, rd, rn, rm) argument
170 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument
171 #define ARM_ADDS_I(rd, rn, imm) _AL3_I(ARM_INST_ADDS, rd, rn, imm) argument
172 #define ARM_ADC_R(rd, rn, rm) _AL3_R(ARM_INST_ADC, rd, rn, rm) argument
173 #define ARM_ADC_I(rd, rn, imm) _AL3_I(ARM_INST_ADC, rd, rn, imm) argument
175 #define ARM_AND_R(rd, rn, rm) _AL3_R(ARM_INST_AND, rd, rn, rm) argument
176 #define ARM_ANDS_R(rd, rn, rm) _AL3_R(ARM_INST_ANDS, rd, rn, rm) argument
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H A Dbpf_jit_32.c426 static inline void emit_mov_i_no8m(const u8 rd, u32 val, struct jit_ctx *ctx) in emit_mov_i_no8m() argument
429 emit(ARM_LDR_I(rd, ARM_PC, imm_offset(val, ctx)), ctx); in emit_mov_i_no8m()
431 emit(ARM_MOVW(rd, val & 0xffff), ctx); in emit_mov_i_no8m()
433 emit(ARM_MOVT(rd, val >> 16), ctx); in emit_mov_i_no8m()
437 static inline void emit_mov_i(const u8 rd, u32 val, struct jit_ctx *ctx) in emit_mov_i() argument
442 emit(ARM_MOV_I(rd, imm12), ctx); in emit_mov_i()
444 emit_mov_i_no8m(rd, val, ctx); in emit_mov_i()
477 static inline void emit_udivmod(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx, u8 op) in emit_udivmod() argument
485 emit(ARM_UDIV(rd, rm, rn), ctx); in emit_udivmod()
488 emit(ARM_MLS(rd, rn, ARM_IP, rm), ctx); in emit_udivmod()
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/OK3568_Linux_fs/kernel/arch/riscv/net/
H A Dbpf_jit.h224 static inline u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd, in rv_r_insn() argument
228 (rd << 7) | opcode; in rv_r_insn()
231 static inline u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode) in rv_i_insn() argument
233 return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) | in rv_i_insn()
254 static inline u32 rv_u_insn(u32 imm31_12, u8 rd, u8 opcode) in rv_u_insn() argument
256 return (imm31_12 << 12) | (rd << 7) | opcode; in rv_u_insn()
259 static inline u32 rv_j_insn(u32 imm20_1, u8 rd, u8 opcode) in rv_j_insn() argument
266 return (imm << 12) | (rd << 7) | opcode; in rv_j_insn()
270 u8 funct3, u8 rd, u8 opcode) in rv_amo_insn() argument
274 return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode); in rv_amo_insn()
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H A Dbpf_jit_comp64.c123 static void emit_imm(u8 rd, s64 val, struct rv_jit_context *ctx) in emit_imm() argument
144 emit_lui(rd, upper, ctx); in emit_imm()
147 emit_li(rd, lower, ctx); in emit_imm()
151 emit_addiw(rd, rd, lower, ctx); in emit_imm()
159 emit_imm(rd, upper, ctx); in emit_imm()
161 emit_slli(rd, rd, shift, ctx); in emit_imm()
163 emit_addi(rd, rd, lower, ctx); in emit_imm()
210 static void emit_bcc(u8 cond, u8 rd, u8 rs, int rvoff, in emit_bcc() argument
215 emit(rv_beq(rd, rs, rvoff >> 1), ctx); in emit_bcc()
218 emit(rv_bltu(rs, rd, rvoff >> 1), ctx); in emit_bcc()
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H A Dbpf_jit_comp32.c111 static void emit_imm(const s8 rd, s32 imm, struct rv_jit_context *ctx) in emit_imm() argument
117 emit(rv_lui(rd, upper), ctx); in emit_imm()
118 emit(rv_addi(rd, rd, lower), ctx); in emit_imm()
120 emit(rv_addi(rd, RV_REG_ZERO, lower), ctx); in emit_imm()
124 static void emit_imm32(const s8 *rd, s32 imm, struct rv_jit_context *ctx) in emit_imm32() argument
127 emit_imm(lo(rd), imm, ctx); in emit_imm32()
131 emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx); in emit_imm32()
133 emit(rv_addi(hi(rd), RV_REG_ZERO, -1), ctx); in emit_imm32()
136 static void emit_imm64(const s8 *rd, s32 imm_hi, s32 imm_lo, in emit_imm64() argument
139 emit_imm(lo(rd), imm_lo, ctx); in emit_imm64()
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/OK3568_Linux_fs/kernel/arch/arm/include/debug/
H A Dsamsung.S12 .macro fifo_level_s5pv210 rd, rx
13 ldr \rd, [\rx, # S3C2410_UFSTAT]
14 ARM_BE8(rev \rd, \rd)
15 and \rd, \rd, #S5PV210_UFSTAT_TXMASK
18 .macro fifo_full_s5pv210 rd, rx
19 ldr \rd, [\rx, # S3C2410_UFSTAT]
20 ARM_BE8(rev \rd, \rd)
21 tst \rd, #S5PV210_UFSTAT_TXFULL
27 .macro fifo_level_s3c2440 rd, rx
28 ldr \rd, [\rx, # S3C2410_UFSTAT]
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H A D8250.S15 .macro store, rd, rx:vararg
16 ARM_BE8(rev \rd, \rd)
17 str \rd, \rx
18 ARM_BE8(rev \rd, \rd)
21 .macro load, rd, rx:vararg
22 ldr \rd, \rx
23 ARM_BE8(rev \rd, \rd)
26 .macro store, rd, rx:vararg
27 strb \rd, \rx
30 .macro load, rd, rx:vararg
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H A Dmsm.S14 .macro senduart, rd, rx
15 ARM_BE8(rev \rd, \rd )
17 str \rd, [\rx, #0x70]
20 .macro waituartcts,rd,rx
23 .macro waituarttxrdy, rd, rx
25 ldr \rd, [\rx, #0x08]
26 ARM_BE8(rev \rd, \rd )
27 tst \rd, #0x08
30 1001: ldr \rd, [\rx, #0x14]
31 ARM_BE8(rev \rd, \rd )
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H A Dicedcc.S15 .macro senduart, rd, rx
16 mcr p14, 0, \rd, c0, c5, 0
19 .macro busyuart, rd, rx
26 .macro waituartcts, rd, rx
29 .macro waituarttxrdy, rd, rx
30 mov \rd, #0x2000000
32 subs \rd, \rd, #1
42 .macro senduart, rd, rx
43 mcr p14, 0, \rd, c8, c0, 0
46 .macro busyuart, rd, rx
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H A Dpl01x.S25 .macro senduart,rd,rx
26 strb \rd, [\rx, #UART01x_DR]
29 .macro waituartcts,rd,rx
32 .macro waituarttxrdy,rd,rx
33 1001: ldr \rd, [\rx, #UART01x_FR]
34 ARM_BE8( rev \rd, \rd )
35 tst \rd, #UART01x_FR_TXFF
39 .macro busyuart,rd,rx
40 1001: ldr \rd, [\rx, #UART01x_FR]
41 ARM_BE8( rev \rd, \rd )
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H A Drenesas-scif.S36 .macro waituartcts,rd,rx
39 .macro waituarttxrdy, rd, rx
40 1001: ldrh \rd, [\rx, #FSR]
41 tst \rd, #TDFE
45 .macro senduart, rd, rx
46 strb \rd, [\rx, #FTDR]
47 ldrh \rd, [\rx, #FSR]
48 bic \rd, \rd, #TEND
49 strh \rd, [\rx, #FSR]
52 .macro busyuart, rd, rx
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H A Dzynq.S32 .macro senduart,rd,rx
33 strb \rd, [\rx, #UART_FIFO_OFFSET] @ TXDATA
36 .macro waituartcts,rd,rx
39 .macro waituarttxrdy,rd,rx
40 1001: ldr \rd, [\rx, #UART_SR_OFFSET]
41 ARM_BE8( rev \rd, \rd )
42 tst \rd, #UART_SR_TXEMPTY
46 .macro busyuart,rd,rx
47 1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
48 ARM_BE8( rev \rd, \rd )
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/OK3568_Linux_fs/u-boot/post/lib_powerpc/
H A Dcpu_asm.h114 #define ASM_1(opcode, rd) ((opcode) + \ argument
115 ((rd) << 21))
118 #define ASM_11(opcode, rd, rs) ((opcode) + \ argument
119 ((rd) << 21) + \
124 #define ASM_11X(opcode, rd, rs) ((opcode) + \ argument
126 ((rd) << 16))
127 #define ASM_11I(opcode, rd, rs, simm) ((opcode) + \ argument
128 ((rd) << 21) + \
131 #define ASM_11IF(opcode, rd, rs, simm) ((opcode) + \ argument
132 ((rd) << 21) + \
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/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Drk_dsm.c123 struct rk_dsm_priv *rd = snd_soc_component_get_drvdata(component); in rk_dsm_dac_pa_get() local
125 if (!rd->pa_ctl) in rk_dsm_dac_pa_get()
128 ucontrol->value.enumerated.item[0] = gpiod_get_value(rd->pa_ctl); in rk_dsm_dac_pa_get()
137 struct rk_dsm_priv *rd = snd_soc_component_get_drvdata(component); in rk_dsm_dac_pa_put() local
139 if (!rd->pa_ctl) in rk_dsm_dac_pa_put()
142 gpiod_set_value(rd->pa_ctl, ucontrol->value.enumerated.item[0]); in rk_dsm_dac_pa_put()
203 static void rk_dsm_enable_clk_dac(struct rk_dsm_priv *rd) in rk_dsm_enable_clk_dac() argument
205 regmap_update_bits(rd->regmap, DACCLKCTRL, in rk_dsm_enable_clk_dac()
218 static int rk_dsm_set_clk(struct rk_dsm_priv *rd, in rk_dsm_set_clk() argument
233 clk_set_rate(rd->clk_dac, mclk); in rk_dsm_set_clk()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/
H A Dmsm_rd.c101 static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) in rd_write() argument
103 struct circ_buf *fifo = &rd->fifo; in rd_write()
110 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open); in rd_write()
111 if (!rd->open) in rd_write()
118 n = min(sz, circ_space_to_end(&rd->fifo)); in rd_write()
125 wake_up_all(&rd->fifo_event); in rd_write()
129 static void rd_write_section(struct msm_rd_state *rd, in rd_write_section() argument
132 rd_write(rd, &type, 4); in rd_write_section()
133 rd_write(rd, &sz, 4); in rd_write_section()
134 rd_write(rd, buf, sz); in rd_write_section()
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/OK3568_Linux_fs/kernel/drivers/powercap/
H A Dintel_rapl_common.c95 void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
132 static int rapl_read_data_raw(struct rapl_domain *rd,
135 static int rapl_write_data_raw(struct rapl_domain *rd,
138 static u64 rapl_unit_xlate(struct rapl_domain *rd,
155 struct rapl_domain *rd; in get_energy_counter() local
162 rd = power_zone_to_rapl_domain(power_zone); in get_energy_counter()
164 if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) { in get_energy_counter()
177 struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev); in get_max_energy_counter() local
179 *energy = rapl_unit_xlate(rd, ENERGY_UNIT, ENERGY_STATUS_MASK, 0); in get_max_energy_counter()
185 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone); in release_zone() local
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/OK3568_Linux_fs/kernel/kernel/time/
H A Dsched_clock.c87 struct clock_read_data *rd; in sched_clock() local
90 rd = sched_clock_read_begin(&seq); in sched_clock()
92 cyc = (rd->read_sched_clock() - rd->epoch_cyc) & in sched_clock()
93 rd->sched_clock_mask; in sched_clock()
94 res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); in sched_clock()
110 static void update_clock_read_data(struct clock_read_data *rd) in update_clock_read_data() argument
113 cd.read_data[1] = *rd; in update_clock_read_data()
119 cd.read_data[0] = *rd; in update_clock_read_data()
132 struct clock_read_data rd; in update_sched_clock() local
134 rd = cd.read_data[0]; in update_sched_clock()
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/OK3568_Linux_fs/kernel/drivers/soc/rockchip/
H A Drockchip_ramdisk.c37 static struct page *rd_lookup_page(struct rd_device *rd, sector_t sector) in rd_lookup_page() argument
43 page = phys_to_page(rd->mem_addr + (idx << PAGE_SHIFT)); in rd_lookup_page()
52 static void copy_to_rd(struct rd_device *rd, const void *src, in copy_to_rd() argument
61 page = rd_lookup_page(rd, sector); in copy_to_rd()
72 page = rd_lookup_page(rd, sector); in copy_to_rd()
84 static void copy_from_rd(void *dst, struct rd_device *rd, in copy_from_rd() argument
93 page = rd_lookup_page(rd, sector); in copy_from_rd()
106 page = rd_lookup_page(rd, sector); in copy_from_rd()
120 static int rd_do_bvec(struct rd_device *rd, struct page *page, in rd_do_bvec() argument
128 copy_from_rd(mem + off, rd, sector, len); in rd_do_bvec()
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/OK3568_Linux_fs/kernel/fs/jffs2/
H A Dwrite.c206 struct jffs2_raw_dirent *rd, const unsigned char *name, in jffs2_write_dirent() argument
218 je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino), in jffs2_write_dirent()
219 je32_to_cpu(rd->name_crc)); in jffs2_write_dirent()
221 D1(if(je32_to_cpu(rd->hdr_crc) != crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)) { in jffs2_write_dirent()
231 je32_to_cpu(rd->pino), name, name, je32_to_cpu(rd->ino), in jffs2_write_dirent()
232 je32_to_cpu(rd->name_crc)); in jffs2_write_dirent()
237 vecs[0].iov_base = rd; in jffs2_write_dirent()
238 vecs[0].iov_len = sizeof(*rd); in jffs2_write_dirent()
246 fd->version = je32_to_cpu(rd->version); in jffs2_write_dirent()
247 fd->ino = je32_to_cpu(rd->ino); in jffs2_write_dirent()
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H A Ddir.c285 struct jffs2_raw_dirent *rd; in jffs2_symlink() local
379 ret = jffs2_reserve_space(c, sizeof(*rd)+namelen, &alloclen, in jffs2_symlink()
384 rd = jffs2_alloc_raw_dirent(); in jffs2_symlink()
385 if (!rd) { in jffs2_symlink()
395 rd->magic = cpu_to_je16(JFFS2_MAGIC_BITMASK); in jffs2_symlink()
396 rd->nodetype = cpu_to_je16(JFFS2_NODETYPE_DIRENT); in jffs2_symlink()
397 rd->totlen = cpu_to_je32(sizeof(*rd) + namelen); in jffs2_symlink()
398 rd->hdr_crc = cpu_to_je32(crc32(0, rd, sizeof(struct jffs2_unknown_node)-4)); in jffs2_symlink()
400 rd->pino = cpu_to_je32(dir_i->i_ino); in jffs2_symlink()
401 rd->version = cpu_to_je32(++dir_f->highest_version); in jffs2_symlink()
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/OK3568_Linux_fs/kernel/drivers/media/tuners/
H A Dqt1010.c51 qt1010_i2c_oper_t rd[48] = { in qt1010_set_params() local
123 rd[2].val = reg05; in qt1010_set_params()
126 rd[4].val = (freq + QT1010_OFFSET) / FREQ1; in qt1010_set_params()
129 if (mod1 < 8000000) rd[6].val = 0x1d; in qt1010_set_params()
130 else rd[6].val = 0x1c; in qt1010_set_params()
133 if (mod1 < 1*FREQ2) rd[7].val = 0x09; /* +0 MHz */ in qt1010_set_params()
134 else if (mod1 < 2*FREQ2) rd[7].val = 0x08; /* +4 MHz */ in qt1010_set_params()
135 else if (mod1 < 3*FREQ2) rd[7].val = 0x0f; /* +8 MHz */ in qt1010_set_params()
136 else if (mod1 < 4*FREQ2) rd[7].val = 0x0e; /* +12 MHz */ in qt1010_set_params()
137 else if (mod1 < 5*FREQ2) rd[7].val = 0x0d; /* +16 MHz */ in qt1010_set_params()
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/OK3568_Linux_fs/u-boot/arch/arm/include/debug/
H A D8250.S16 .macro store, rd, rx:vararg
17 str \rd, \rx
20 .macro load, rd, rx:vararg
21 ldr \rd, \rx
24 .macro store, rd, rx:vararg
25 strb \rd, \rx
28 .macro load, rd, rx:vararg
29 ldrb \rd, \rx
35 .macro senduart,rd,rx
36 store \rd, [\rx, #UART_TX << UART_SHIFT]
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/OK3568_Linux_fs/kernel/arch/sparc/include/asm/
H A Dhead_32.h13 rd %psr, %l0; b label; rd %wim, %l3; nop;
16 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
17 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
21 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
38 rd %psr, %l0;
42 rd %psr,%l0; \
50 rd %psr,%l0; \
59 b getcc_trap_handler; rd %psr, %l0; nop; nop;
63 b setcc_trap_handler; rd %psr, %l0; nop; nop;
67 rd %psr, %i0; jmp %l2; rett %l2 + 4; nop;
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/OK3568_Linux_fs/kernel/drivers/reset/
H A Dreset-pistachio.c66 struct pistachio_reset_data *rd; in pistachio_reset_assert() local
70 rd = container_of(rcdev, struct pistachio_reset_data, rcdev); in pistachio_reset_assert()
76 return regmap_update_bits(rd->periph_regs, PISTACHIO_SOFT_RESET, in pistachio_reset_assert()
83 struct pistachio_reset_data *rd; in pistachio_reset_deassert() local
87 rd = container_of(rcdev, struct pistachio_reset_data, rcdev); in pistachio_reset_deassert()
93 return regmap_update_bits(rd->periph_regs, PISTACHIO_SOFT_RESET, in pistachio_reset_deassert()
104 struct pistachio_reset_data *rd; in pistachio_reset_probe() local
108 rd = devm_kzalloc(dev, sizeof(*rd), GFP_KERNEL); in pistachio_reset_probe()
109 if (!rd) in pistachio_reset_probe()
112 rd->periph_regs = syscon_node_to_regmap(np->parent); in pistachio_reset_probe()
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/OK3568_Linux_fs/kernel/arch/arm/mach-tegra/
H A Dsleep.h51 .macro cpu_to_halt_reg rd, rcpu
53 subne \rd, \rcpu, #1
54 movne \rd, \rd, lsl #3
55 addne \rd, \rd, #0x14
56 moveq \rd, #0
60 .macro cpu_to_csr_reg rd, rcpu
62 subne \rd, \rcpu, #1
63 movne \rd, \rd, lsl #3
64 addne \rd, \rd, #0x18
65 moveq \rd, #8
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12345678910>>...26