1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright 2005, 2007 Simtec Electronics 4*4882a593Smuzhiyun * http://armlinux.simtec.co.uk/ 5*4882a593Smuzhiyun * Ben Dooks <ben@simtec.co.uk> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include <linux/serial_s3c.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/* The S5PV210/S5PC110 implementations are as belows. */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun .macro fifo_level_s5pv210 rd, rx 13*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UFSTAT] 14*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 15*4882a593Smuzhiyun and \rd, \rd, #S5PV210_UFSTAT_TXMASK 16*4882a593Smuzhiyun .endm 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun .macro fifo_full_s5pv210 rd, rx 19*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UFSTAT] 20*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 21*4882a593Smuzhiyun tst \rd, #S5PV210_UFSTAT_TXFULL 22*4882a593Smuzhiyun .endm 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun/* The S3C2440 implementations are used by default as they are the 25*4882a593Smuzhiyun * most widely re-used */ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun .macro fifo_level_s3c2440 rd, rx 28*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UFSTAT] 29*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 30*4882a593Smuzhiyun and \rd, \rd, #S3C2440_UFSTAT_TXMASK 31*4882a593Smuzhiyun .endm 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun#ifndef fifo_level 34*4882a593Smuzhiyun#define fifo_level fifo_level_s3c2440 35*4882a593Smuzhiyun#endif 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun .macro fifo_full_s3c2440 rd, rx 38*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UFSTAT] 39*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 40*4882a593Smuzhiyun tst \rd, #S3C2440_UFSTAT_TXFULL 41*4882a593Smuzhiyun .endm 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun#ifndef fifo_full 44*4882a593Smuzhiyun#define fifo_full fifo_full_s3c2440 45*4882a593Smuzhiyun#endif 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun .macro senduart,rd,rx 48*4882a593Smuzhiyun strb \rd, [\rx, # S3C2410_UTXH] 49*4882a593Smuzhiyun .endm 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun .macro busyuart, rd, rx 52*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UFCON] 53*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 54*4882a593Smuzhiyun tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 55*4882a593Smuzhiyun beq 1001f @ 56*4882a593Smuzhiyun @ FIFO enabled... 57*4882a593Smuzhiyun1003: 58*4882a593Smuzhiyun fifo_full \rd, \rx 59*4882a593Smuzhiyun bne 1003b 60*4882a593Smuzhiyun b 1002f 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun1001: 63*4882a593Smuzhiyun @ busy waiting for non fifo 64*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UTRSTAT] 65*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 66*4882a593Smuzhiyun tst \rd, #S3C2410_UTRSTAT_TXFE 67*4882a593Smuzhiyun beq 1001b 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun1002: @ exit busyuart 70*4882a593Smuzhiyun .endm 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun .macro waituartcts,rd,rx 73*4882a593Smuzhiyun .endm 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun .macro waituarttxrdy,rd,rx 76*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UFCON] 77*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 78*4882a593Smuzhiyun tst \rd, #S3C2410_UFCON_FIFOMODE @ fifo enabled? 79*4882a593Smuzhiyun beq 1001f @ 80*4882a593Smuzhiyun @ FIFO enabled... 81*4882a593Smuzhiyun1003: 82*4882a593Smuzhiyun fifo_level \rd, \rx 83*4882a593Smuzhiyun teq \rd, #0 84*4882a593Smuzhiyun bne 1003b 85*4882a593Smuzhiyun b 1002f 86*4882a593Smuzhiyun1001: 87*4882a593Smuzhiyun @ idle waiting for non fifo 88*4882a593Smuzhiyun ldr \rd, [\rx, # S3C2410_UTRSTAT] 89*4882a593SmuzhiyunARM_BE8(rev \rd, \rd) 90*4882a593Smuzhiyun tst \rd, #S3C2410_UTRSTAT_TXFE 91*4882a593Smuzhiyun beq 1001b 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun1002: @ exit busyuart 94*4882a593Smuzhiyun .endm 95