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/rk3399_ARM-atf/docs/plat/
H A Dimx8.rst1 NXP i.MX 8 Series
4 The i.MX 8 series of applications processors is a feature- and
12 The i.MX8QM is with 2 Cortex-A72 ARM core, 4 Cortex-A53 ARM core
15 The i.MX8QX is with 4 Cortex-A35 ARM core and 1 Cortex-M4 system
19 control for system-level resources on i.MX8. The heart of the system
45 Target_SoC should be "imx8qm" for i.MX8QM SoC.
46 Target_SoC should be "imx8qx" for i.MX8QX SoC.
58 …processors/i.mx-applications-processors/i.mx-8-processors/i.mx-8-family-arm-cortex-a53-cortex-a72-…
/rk3399_ARM-atf/plat/hisilicon/hikey960/drivers/ipc/
H A Dhisi_ipc.c73 volatile int i; in cpu_relax() local
75 for (i = 0; i < 10; i++) in cpu_relax()
195 enum lpm3_mbox_id i = LPM3_MBX0; in hisi_ipc_init() local
198 for (i = LPM3_MBX0; i <= LPM3_MBX4; i++) { in hisi_ipc_init()
199 mmio_write_32(IPC_MBX_MODE_REG(i), 1); in hisi_ipc_init()
200 mmio_write_32(IPC_MBX_IMASK_REG(i), in hisi_ipc_init()
202 mmio_write_32(IPC_MBX_ICLR_REG(i), SRC_A7); in hisi_ipc_init()
/rk3399_ARM-atf/plat/xilinx/versal/
H A Dbl31_versal_setup.c162 uint32_t i; in request_intr_type_el3() local
172 for (i = 0; i < index; i++) { in request_intr_type_el3()
173 if (id == type_el3_interrupt_table[i].id) { in request_intr_type_el3()
193 uint32_t i; in rdo_el3_interrupt_handler() local
199 for (i = 0; i < MAX_INTR_EL3; i++) { in rdo_el3_interrupt_handler()
200 if (intr_id == type_el3_interrupt_table[i].id) { in rdo_el3_interrupt_handler()
201 handler = type_el3_interrupt_table[i].handler; in rdo_el3_interrupt_handler()
/rk3399_ARM-atf/plat/imx/imx8m/include/
H A Dimx_rdc.h58 #define RDC_MDAn(i, mda) \ argument
59 {RDC_MDA, (i), .setting.rdc_mda = (mda), }
60 #define RDC_PDAPn(i, pdap) \ argument
61 {RDC_PDAP, (i), .setting.rdc_pdap = (pdap), }
63 #define RDC_MEM_REGIONn(i, msa, mea, mrc) \ argument
64 { RDC_MEM_REGION, (i), \
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl31_setup.c147 int i; in hikey960_edma_init() local
154 for (i = 1; i < EDMAC_CHANNEL_NUMS; i++) { in hikey960_edma_init()
155 mmio_write_32(EDMAC_AXI_CONF(i), (1 << 6) | (1 << 18)); in hikey960_edma_init()
161 int i; in hikey960_iomcu_dma_init() local
168 for (i = 4; i < IOMCU_DMAC_CHANNEL_NUMS; i++) { in hikey960_iomcu_dma_init()
169 mmio_write_32(IOMCU_DMAC_AXI_CONF(i), IOMCU_DMAC_AXI_CONF_ARPROT_NS | in hikey960_iomcu_dma_init()
/rk3399_ARM-atf/plat/imx/imx8m/ddr/
H A Ddram_retention.c28 uint32_t i, offset; in rank_setting_update() local
34 for (i = 0U; i < pstate_num; i++) { in rank_setting_update()
35 offset = i ? (i + 1) * 0x1000 : 0U; in rank_setting_update()
36 mmio_write_32(DDRC_DRAMTMG2(0) + offset, dram_info.rank_setting[i][0]); in rank_setting_update()
38 mmio_write_32(DDRC_DRAMTMG9(0) + offset, dram_info.rank_setting[i][1]); in rank_setting_update()
43 dram_info.rank_setting[i][2]); in rank_setting_update()
H A Dclock.c14 #define CCM_IP_CLK_ROOT_GEN_TAGET(i) (IMX_CCM_IP_BASE + 0x80 * (i) + 0x00) argument
15 #define CCM_IP_CLK_ROOT_GEN_TAGET_SET(i) (IMX_CCM_IP_BASE + 0x80 * (i) + 0x04) argument
16 #define CCM_IP_CLK_ROOT_GEN_TAGET_CLR(i) (IMX_CCM_IP_BASE + 0x80 * (i) + 0x08) argument
/rk3399_ARM-atf/tools/encrypt_fw/src/
H A Dencrypt.c31 int bytes, enc_len = 0, i, j, ret = 0; in gcm_encrypt() local
41 for (i = 0, j = 0; i < KEY_SIZE; i++, j += 2) { in gcm_encrypt()
42 if (sscanf(&key_string[j], "%02hhx", &key[i]) != 1) { in gcm_encrypt()
53 for (i = 0, j = 0; i < IV_SIZE; i++, j += 2) { in gcm_encrypt()
54 if (sscanf(&nonce_string[j], "%02hhx", &iv[i]) != 1) { in gcm_encrypt()
/rk3399_ARM-atf/plat/imx/imx8m/imx8mn/
H A Dgpc.c145 int i; in imx_gpc_init() local
148 for (i = 0; i < 4; i++) { in imx_gpc_init()
149 mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_A53 + i * 4, ~0x0); in imx_gpc_init()
150 mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0); in imx_gpc_init()
151 mmio_write_32(IMX_GPC_BASE + IMR1_CORE2_A53 + i * 4, ~0x0); in imx_gpc_init()
152 mmio_write_32(IMX_GPC_BASE + IMR1_CORE3_A53 + i * 4, ~0x0); in imx_gpc_init()
153 mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_M4 + i * 4, ~0x0); in imx_gpc_init()
/rk3399_ARM-atf/drivers/renesas/rcar/cpld/
H A Dulcb_cpld.c67 int i; in cpld_write() local
69 for (i = 0; i < 32; i++) { in cpld_write()
77 for (i = 0; i < 8; i++) { in cpld_write()
/rk3399_ARM-atf/plat/qemu/qemu_sbsa/
H A Dsbsa_pm.c80 unsigned int i; in qemu_validate_power_state() local
89 for (i = 0U; qemu_pm_idle_states[i] != 0U; i++) { in qemu_validate_power_state()
90 if (power_state == qemu_pm_idle_states[i]) { in qemu_validate_power_state()
96 if (qemu_pm_idle_states[i] == 0U) { in qemu_validate_power_state()
100 i = 0U; in qemu_validate_power_state()
105 req_state->pwr_domain_state[i++] = state_id & in qemu_validate_power_state()
/rk3399_ARM-atf/common/backtrace/
H A Dbacktrace.c126 for (size_t i = 0; i < size; i++) { in is_valid_object() local
127 if (!is_address_readable(addr + i)) in is_valid_object()
201 for (unsigned int i = 1U; i < UNWIND_LIMIT; i++) { in unwind_stack() local
220 printf(backtrace_str, i, el_str, call_site); in unwind_stack()
/rk3399_ARM-atf/lib/extensions/ras/
H A Dras_common.c67 unsigned int i, n_handled = 0; in ras_ea_handler() local
81 for_each_err_record_info(i, info) { in ras_ea_handler()
105 unsigned int i, last; in assert_interrupts_sorted() local
112 for (i = 1; i < ras_interrupt_mappings.num_intrs; i++) { in assert_interrupts_sorted()
113 assert(start[i].intr_number > last); in assert_interrupts_sorted()
114 last = start[i].intr_number; in assert_interrupts_sorted()
/rk3399_ARM-atf/plat/qemu/common/
H A Dqemu_pm.c75 int i; in qemu_validate_power_state() local
84 for (i = 0; !!qemu_pm_idle_states[i]; i++) { in qemu_validate_power_state()
85 if (power_state == qemu_pm_idle_states[i]) in qemu_validate_power_state()
90 if (!qemu_pm_idle_states[i]) in qemu_validate_power_state()
93 i = 0; in qemu_validate_power_state()
98 req_state->pwr_domain_state[i++] = state_id & in qemu_validate_power_state()
/rk3399_ARM-atf/drivers/st/usb_dwc3/
H A Dusb_dwc3.c961 uint8_t i; in usb_dwc3_stop_device() local
969 for (i = 0; i < USB_DWC3_NUM_IN_EP; i++) { in usb_dwc3_stop_device()
970 dwc3_ep_stop_xfer(dwc3_handle, &dwc3_handle->pcd_handle->in_ep[i]); in usb_dwc3_stop_device()
974 for (i = 0; i < USB_DWC3_NUM_OUT_EP; i++) { in usb_dwc3_stop_device()
975 dwc3_ep_stop_xfer(dwc3_handle, &dwc3_handle->pcd_handle->out_ep[i]); in usb_dwc3_stop_device()
993 for (i = 0; i < USB_DWC3_INT_INUSE; i++) { in usb_dwc3_stop_device()
994 evtcnt = dwc3_read_intr_count(dwc3_handle, i); in usb_dwc3_stop_device()
1000 __HAL_PCD_INCR_EVENT_POS(dwc3_handle, i, evtcnt); in usb_dwc3_stop_device()
1002 dwc3_ack_evt_count(dwc3_handle, i, evtcnt); in usb_dwc3_stop_device()
1676 uint8_t i, speed; in dwc3_handle_dev_event() local
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3328/drivers/pmu/
H A Dpmu.c251 int i; in clks_gating_suspend() local
253 for (i = 0; i < CRU_CLKGATE_NUMS; i++) { in clks_gating_suspend()
254 ddr_data.clk_ungt_save[i] = in clks_gating_suspend()
255 mmio_read_32(CRU_BASE + CRU_CLKGATE_CON(i)); in clks_gating_suspend()
256 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_suspend()
257 ((~ungt_msk[i]) << 16) | 0xffff); in clks_gating_suspend()
263 int i; in clks_gating_resume() local
265 for (i = 0; i < CRU_CLKGATE_NUMS; i++) in clks_gating_resume()
266 mmio_write_32(CRU_BASE + CRU_CLKGATE_CON(i), in clks_gating_resume()
267 ddr_data.clk_ungt_save[i] | 0xffff0000); in clks_gating_resume()
[all …]
/rk3399_ARM-atf/plat/allwinner/common/
H A Dsunxi_bl31_setup.c56 int i; in sunxi_find_dtb() local
60 for (i = 0; i < 2048 / sizeof(uint64_t); i++) { in sunxi_find_dtb()
63 if (u_boot_base[i] != PRELOADED_BL33_BASE) in sunxi_find_dtb()
67 if (u_boot_base[i + 1] >= 256 * 1024 * 1024) in sunxi_find_dtb()
71 dtb_base = (char *)u_boot_base + u_boot_base[i + 1]; in sunxi_find_dtb()
/rk3399_ARM-atf/services/std_svc/trng/
H A Dtrng_entropy_pool.c37 #define ENTROPY_WORD_INDEX(i) ((ENTROPY_MIN_WORD + i) % WORDS_IN_POOL) argument
233 int i; in trng_entropy_pool_setup() local
235 for (i = 0; i < WORDS_IN_POOL; i++) { in trng_entropy_pool_setup()
236 entropy[i] = 0; in trng_entropy_pool_setup()
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhisi_dvfs.c662 unsigned int i; in acpu_dvfs_set_freq() local
669 for (i = 0; i < acpu_dvfs_sram_buf->support_freq_num; i++) { in acpu_dvfs_set_freq()
671 if (max_freq == hi6220_acpu_profile[i].freq) { in acpu_dvfs_set_freq()
672 target_prof = i; in acpu_dvfs_set_freq()
677 if (i == acpu_dvfs_sram_buf->support_freq_num) { in acpu_dvfs_set_freq()
683 target_prof = i; in acpu_dvfs_set_freq()
701 for (i = 0; i < acpu_dvfs_sram_buf->support_freq_num; i++) in acpu_dvfs_set_freq()
702 INFO(" - %d: 0x%x\n", i, acpu_dvfs_sram_buf->vol[i]); in acpu_dvfs_set_freq()
761 unsigned int i = 0; in init_acpu_dvfs() local
772 for (i = 0; i < ACPU_FREQ_MAX_NUM; i++) in init_acpu_dvfs()
[all …]
/rk3399_ARM-atf/drivers/nxp/i2c/
H A Di2c.c147 int i; in read_data() local
159 for (i = 0; i < len; i++) { in read_data()
165 if (i == (len - 1)) { in read_data()
167 } else if (i == (len - 2)) { in read_data()
176 buf[i] = i2c_in(&ccsr_i2c->dr); in read_data()
185 int i; in write_data() local
188 for (i = 0; i < len; i++) { in write_data()
189 ret = tx_byte(ccsr_i2c, buf[i]); in write_data()
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/mcdi/
H A Dmtk_mcdi.c207 int i; in check_mcdi_ctl_stat() local
210 for (i = 0; i < ARRAY_SIZE(clk_regs); i++) { in check_mcdi_ctl_stat()
211 if (mmio_read_32(clk_regs[i]) & clk_mask[i]) { in check_mcdi_ctl_stat()
221 i = 500; in check_mcdi_ctl_stat()
222 while (!mcdi_mbox_read(MCDI_MBOX_PAUSE_ACK) && --i > 0) in check_mcdi_ctl_stat()
228 if (i == 0) { in check_mcdi_ctl_stat()
242 i = 500; in check_mcdi_ctl_stat()
243 while ((mcdi_mbox_read(MCDI_MBOX_HP_ACK) & tgt) != tgt && --i > 0) in check_mcdi_ctl_stat()
248 if (i == 0) { in check_mcdi_ctl_stat()
/rk3399_ARM-atf/drivers/brcm/
H A Drng.c59 uint32_t i; in rng_read() local
76 for (i = 0; i < available_words; i++) in rng_read()
77 p_out[word_processed + i] = in rng_read()
/rk3399_ARM-atf/drivers/nxp/flexspi/nor/
H A Dfspi.c209 uint32_t i, x_flash_cr2, seq_id; in fspi_init_ahb() local
213 for (i = 0; i < 8; i++) { in fspi_init_ahb()
214 fspi_writel((FSPI_AHBRX_BUF0CR0 + 4 * i), 0U); in fspi_init_ahb()
285 uint32_t i = 0U, j = 0U, x_rem = 0U; in xspi_ip_read() local
342 for (i = 0U; i < x_iteration; i++) { in xspi_ip_read()
411 uint32_t i = 0U, j = 0U; in xspi_ip_write() local
438 for (i = 0U; i < x_iteration; i++) { in xspi_ip_write()
506 uint32_t i, j = 0U; in xspi_write() local
550 for (i = 0U; i < j; i++) { in xspi_write()
689 uint32_t x_addr, x_len_bytes, i, num_sector = 0U; in xspi_sector_erase() local
[all …]
/rk3399_ARM-atf/lib/coreboot/
H A Dcoreboot_table.c96 int i; in coreboot_get_memory_type() local
98 for (i = 0; i < COREBOOT_MAX_MEMRANGES; i++) { in coreboot_get_memory_type()
99 coreboot_memrange_t *range = &coreboot_memranges[i]; in coreboot_get_memory_type()
123 int i; in coreboot_table_setup() local
133 for (i = 0; i < header->table_entries; i++) { in coreboot_table_setup()
/rk3399_ARM-atf/drivers/renesas/common/watchdog/
H A Dswdt.c140 uint32_t i; in rcar_swdt_release() local
150 for (i = 0; i < IGROUPR_NUM; i++) in rcar_swdt_release()
151 mmio_write_32(SWDT_GICD_IGROUPR + i * 4, 0U); in rcar_swdt_release()
153 for (i = 0; i < ISPRIORITY_NUM; i++) in rcar_swdt_release()
154 mmio_write_32(SWDT_GICD_ISPRIORITYR + i * 4, 0U); in rcar_swdt_release()

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