1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Freescale Semiconductor
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/io.h>
9*4882a593Smuzhiyun #include <asm/types.h>
10*4882a593Smuzhiyun #include <malloc.h>
11*4882a593Smuzhiyun #include <net.h>
12*4882a593Smuzhiyun #include <linux/compat.h>
13*4882a593Smuzhiyun #include <asm/arch/fsl_serdes.h>
14*4882a593Smuzhiyun #include <fsl-mc/ldpaa_wriop.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun struct wriop_dpmac_info dpmac_info[NUM_WRIOP_PORTS];
17*4882a593Smuzhiyun
wriop_dpmac_enet_if(int dpmac_id,int lane_prtc)18*4882a593Smuzhiyun __weak phy_interface_t wriop_dpmac_enet_if(int dpmac_id, int lane_prtc)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun return PHY_INTERFACE_MODE_NONE;
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
wriop_init_dpmac(int sd,int dpmac_id,int lane_prtcl)23*4882a593Smuzhiyun void wriop_init_dpmac(int sd, int dpmac_id, int lane_prtcl)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun phy_interface_t enet_if;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun dpmac_info[dpmac_id].enabled = 0;
28*4882a593Smuzhiyun dpmac_info[dpmac_id].id = 0;
29*4882a593Smuzhiyun dpmac_info[dpmac_id].phy_addr = -1;
30*4882a593Smuzhiyun dpmac_info[dpmac_id].enet_if = PHY_INTERFACE_MODE_NONE;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun enet_if = wriop_dpmac_enet_if(dpmac_id, lane_prtcl);
33*4882a593Smuzhiyun if (enet_if != PHY_INTERFACE_MODE_NONE) {
34*4882a593Smuzhiyun dpmac_info[dpmac_id].enabled = 1;
35*4882a593Smuzhiyun dpmac_info[dpmac_id].id = dpmac_id;
36*4882a593Smuzhiyun dpmac_info[dpmac_id].enet_if = enet_if;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun }
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*TODO what it do */
wriop_dpmac_to_index(int dpmac_id)41*4882a593Smuzhiyun static int wriop_dpmac_to_index(int dpmac_id)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun int i;
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
46*4882a593Smuzhiyun if (dpmac_info[i].id == dpmac_id)
47*4882a593Smuzhiyun return i;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun return -1;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
wriop_disable_dpmac(int dpmac_id)53*4882a593Smuzhiyun void wriop_disable_dpmac(int dpmac_id)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (i == -1)
58*4882a593Smuzhiyun return;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun dpmac_info[i].enabled = 0;
61*4882a593Smuzhiyun wriop_dpmac_disable(dpmac_id);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
wriop_enable_dpmac(int dpmac_id)64*4882a593Smuzhiyun void wriop_enable_dpmac(int dpmac_id)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun if (i == -1)
69*4882a593Smuzhiyun return;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun dpmac_info[i].enabled = 1;
72*4882a593Smuzhiyun wriop_dpmac_enable(dpmac_id);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
wriop_is_enabled_dpmac(int dpmac_id)75*4882a593Smuzhiyun u8 wriop_is_enabled_dpmac(int dpmac_id)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (i == -1)
80*4882a593Smuzhiyun return -1;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun return dpmac_info[i].enabled;
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun
wriop_set_mdio(int dpmac_id,struct mii_dev * bus)86*4882a593Smuzhiyun void wriop_set_mdio(int dpmac_id, struct mii_dev *bus)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (i == -1)
91*4882a593Smuzhiyun return;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun dpmac_info[i].bus = bus;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
wriop_get_mdio(int dpmac_id)96*4882a593Smuzhiyun struct mii_dev *wriop_get_mdio(int dpmac_id)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun if (i == -1)
101*4882a593Smuzhiyun return NULL;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun return dpmac_info[i].bus;
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
wriop_set_phy_address(int dpmac_id,int address)106*4882a593Smuzhiyun void wriop_set_phy_address(int dpmac_id, int address)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (i == -1)
111*4882a593Smuzhiyun return;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun dpmac_info[i].phy_addr = address;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
wriop_get_phy_address(int dpmac_id)116*4882a593Smuzhiyun int wriop_get_phy_address(int dpmac_id)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (i == -1)
121*4882a593Smuzhiyun return -1;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return dpmac_info[i].phy_addr;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
wriop_set_phy_dev(int dpmac_id,struct phy_device * phydev)126*4882a593Smuzhiyun void wriop_set_phy_dev(int dpmac_id, struct phy_device *phydev)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun if (i == -1)
131*4882a593Smuzhiyun return;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun dpmac_info[i].phydev = phydev;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
wriop_get_phy_dev(int dpmac_id)136*4882a593Smuzhiyun struct phy_device *wriop_get_phy_dev(int dpmac_id)
137*4882a593Smuzhiyun {
138*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun if (i == -1)
141*4882a593Smuzhiyun return NULL;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun return dpmac_info[i].phydev;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
wriop_get_enet_if(int dpmac_id)146*4882a593Smuzhiyun phy_interface_t wriop_get_enet_if(int dpmac_id)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun int i = wriop_dpmac_to_index(dpmac_id);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun if (i == -1)
151*4882a593Smuzhiyun return PHY_INTERFACE_MODE_NONE;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (dpmac_info[i].enabled)
154*4882a593Smuzhiyun return dpmac_info[i].enet_if;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun return PHY_INTERFACE_MODE_NONE;
157*4882a593Smuzhiyun }
158