| /rk3399_ARM-atf/drivers/cadence/combo_phy/ |
| H A D | cdns_combo_phy.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/plat/intel/soc/common/drivers/sdmmc/ |
| H A D | sdmmc.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| H A D | sdmmc.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/plat/intel/soc/common/drivers/nand/ |
| H A D | nand.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| H A D | nand.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/include/drivers/cadence/ |
| H A D | cdns_combo_phy.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| H A D | cdns_nand.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| H A D | cdns_sdmmc.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/plat/intel/soc/common/drivers/combophy/ |
| H A D | combophy.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| H A D | combophy.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/drivers/cadence/nand/ |
| H A D | cdns_nand.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/plat/intel/soc/common/drivers/qspi/ |
| H A D | cadence_qspi.h | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| H A D | cadence_qspi.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/drivers/cadence/emmc/ |
| H A D | cdns_sdmmc.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|
| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_storage.c | ddaf02d17142187d9f17acd4900aafa598666317 Wed May 17 04:26:11 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
|