| #
2c89ca45 |
| 09-Jul-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(intel): add in watchdog for QSPI driver" into integration
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| #
6704cba2 |
| 26-Mar-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): add in watchdog for QSPI driver
ATF->Linux boot with QSPI boot source need to enable watchdog
so that it will not hang.
Change-Id: Id2a9ceebb1c89f711992a424f4394265efc6b388
Signed-off-b
fix(intel): add in watchdog for QSPI driver
ATF->Linux boot with QSPI boot source need to enable watchdog
so that it will not hang.
Change-Id: Id2a9ceebb1c89f711992a424f4394265efc6b388
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
show more ...
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| #
86a2b7c0 |
| 28-Nov-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(intel): read QSPI bank buffer data in bytes" into integration
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| #
2f17ac01 |
| 12-Oct-2023 |
Girisha Dengi <girisha.dengi@intel.com> |
fix(intel): read QSPI bank buffer data in bytes
Read QSPI bank buffer data in bytes to avoid
inter-bank read failures.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Change-Id: If768d7cdd36
fix(intel): read QSPI bank buffer data in bytes
Read QSPI bank buffer data in bytes to avoid
inter-bank read failures.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Change-Id: If768d7cdd362694df3f3c86c959afad01a523f21
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|
| #
3393060c |
| 06-Jul-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "agilex5" into integration
* changes:
feat(intel): platform enablement for Agilex5 SoC FPGA
feat(intel): ccu driver for Agilex5 SoC FPGA
feat(intel): vab support for A
Merge changes from topic "agilex5" into integration
* changes:
feat(intel): platform enablement for Agilex5 SoC FPGA
feat(intel): ccu driver for Agilex5 SoC FPGA
feat(intel): vab support for Agilex5 SoC FPGA
feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
feat(intel): ddr driver for Agilex5 SoC FPGA
feat(intel): power manager for Agilex5 SoC FPGA
feat(intel): cold/warm reset and smp support for Agilex5 SoC FPGA
feat(intel): reset manager support for Agilex5 SoC FPGA
feat(intel): mailbox and SMC support for Agilex5 SoC FPGA
feat(intel): system manager support for Agilex5 SoC FPGA
feat(intel): memory controller support for Agilex5 SoC FPGA
feat(intel): clock manager support for Agilex5 SoC FPGA
feat(intel): mmc support for Agilex5 SoC FPGA
feat(intel): uart support for Agilex5 SoC FPGA
feat(intel): pinmux, peripheral and Handoff support for Agilex5 SoC FPGA
show more ...
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| #
ddaf02d1 |
| 17-May-2023 |
Jit Loon Lim <jit.loon.lim@intel.com> |
feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-
feat(intel): sdmmc/nand/combo-phy/qspi driver for Agilex5 SoC FPGA
This patch is used to implement sdmmc/nand/combo-phy
driver to support Cadence IP for Agilex5 SoC FPGA.
1. Added SDMMC/NAND/COMBO-PHY support.
2. Updated product name -> Agilex5
3. Updated QSPI base address
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I6db689d2b784c9f59a25701ab34517f6f6b0a0e6
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| #
743600b2 |
| 13-Jan-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "intel: Remove un-needed checks for qspi driver r/w" into integration
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| #
f6c4b19a |
| 13-Jan-2020 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Remove un-needed checks for qspi driver r/w
This patch removes un-needed r/w parameter checks for qspi driver. The
driver can actually access any offset and size.
Signed-off-by: Hadi Asyrafi
intel: Remove un-needed checks for qspi driver r/w
This patch removes un-needed r/w parameter checks for qspi driver. The
driver can actually access any offset and size.
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: If60b2c016aa91e2c24ddc57c6ad410c8dc5dcf53
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| #
b3257a3d |
| 04-Dec-2019 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "intel: Refactor common platform code [5/5]" into integration
|
| #
1520b5d6 |
| 23-Oct-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Refactor common platform code [5/5]
Removes unused source code for BL2 and BL31 in platform.mk.
Clean-up unused header files, syntax fixes, and alphabetical
sorting post-refactoring
Signed-o
intel: Refactor common platform code [5/5]
Removes unused source code for BL2 and BL31 in platform.mk.
Clean-up unused header files, syntax fixes, and alphabetical
sorting post-refactoring
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ie5ea9b4d3abdb0187cddeb04d2fcfb51fbe5c4dd
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|
| #
93c77622 |
| 26-Jun-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge changes from topic "pull-out-drivers" into integration
* changes:
intel: Add ncore ccu driver
intel: Fix watchdog driver structure
intel: Fix qspi driver write config
intel: Pull out c
Merge changes from topic "pull-out-drivers" into integration
* changes:
intel: Add ncore ccu driver
intel: Fix watchdog driver structure
intel: Fix qspi driver write config
intel: Pull out common drivers into platform common
show more ...
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| #
2a165023 |
| 17-Jun-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Fix qspi driver write config
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I5241ed97697b0280b590b47b9173d102d23f305a
|
| #
bf719f66 |
| 12-Jun-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Pull out common drivers into platform common
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib79e2c6fe6e66dec5004701133ad6a5f4c78f2fa
|