Searched hist:a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 (Results 1 – 8 of 8) sorted by relevance
| /optee_os/core/arch/arm/plat-stm32mp1/ |
| H A D | boot_api.h | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | reset.S | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | sub.mk | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | platform_config.h | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | main.c | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | conf.mk | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| /optee_os/ |
| H A D | README.md | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|
| H A D | MAINTAINERS | a30d4efb140ba9b9b15c50e752f21dc53e1d7fe1 Tue Jun 19 07:45:03 UTC 2018 Etienne Carriere <etienne.carriere@st.com> plat-stm32mp1: add initial support
Introduce platform stm32mp1 with board stm32mp1-stm32mp157c-ev1 based
on stm32mp1 SoC family integrating Arm Cortex-A7 technology. In its
default configuration, stm32mp1 OP-TEE core operates in a 256kB secure
RAM with pager support enabled.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
|