Searched +full:uniphier +full:- +full:ld11 +full:- +full:clock (Results 1 – 9 of 9) sorted by relevance
2 * Device Tree Source for UniPhier LD11 SoC7 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)13 compatible = "socionext,uniphier-ld11";14 #address-cells = <2>;15 #size-cells = <2>;16 interrupt-parent = <&gic>;19 #address-cells = <2>;20 #size-cells = <0>;22 cpu-map {35 compatible = "arm,cortex-a53", "arm,armv8";[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/clock/socionext,uniphier-clock.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: UniPhier clock controller10 - Masahiro Yamada <yamada.masahiro@socionext.com>15 - description: System clock17 - socionext,uniphier-ld4-clock18 - socionext,uniphier-pro4-clock19 - socionext,uniphier-sld8-clock[all …]
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT3 // Device Tree Source for UniPhier LD11 SoC8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/gpio/uniphier-gpio.h>12 compatible = "socionext,uniphier-ld11";13 #address-cells = <2>;14 #size-cells = <2>;15 interrupt-parent = <&gic>;18 #address-cells = <2>;19 #size-cells = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later7 #include <linux/clk-provider.h>14 #include "clk-uniphier.h"20 switch (data->type) { in uniphier_clk_register()22 return uniphier_clk_register_cpugear(dev, regmap, data->name, in uniphier_clk_register()23 &data->data.cpugear); in uniphier_clk_register()25 return uniphier_clk_register_fixed_factor(dev, data->name, in uniphier_clk_register()26 &data->data.factor); in uniphier_clk_register()28 return uniphier_clk_register_fixed_rate(dev, data->name, in uniphier_clk_register()29 &data->data.rate); in uniphier_clk_register()[all …]
5 * SPDX-License-Identifier: GPL-2.0+9 #include <clk-uclass.h>15 #include "clk-uniphier.h"18 * struct uniphier_clk_priv - private data for UniPhier clock driver20 * @base: base address of the clock provider30 struct uniphier_clk_priv *priv = dev_get_priv(clk->dev); in uniphier_clk_enable()31 unsigned long id = clk->id; in uniphier_clk_enable()34 for (p = priv->data->gate; p->id != UNIPHIER_CLK_ID_END; p++) { in uniphier_clk_enable()37 if (p->id != id) in uniphier_clk_enable()40 val = readl(priv->base + p->reg); in uniphier_clk_enable()[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/sound/socionext,uniphier-aio.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: UniPhier AIO audio system10 - <alsa-devel@alsa-project.org>15 - socionext,uniphier-ld11-aio16 - socionext,uniphier-ld20-aio17 - socionext,uniphier-pxs2-aio25 clock-names:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/net/socionext,uniphier-ave4.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>14 implemented on Socionext UniPhier SoCs.17 - $ref: ethernet-controller.yaml#22 - socionext,uniphier-pro4-ave423 - socionext,uniphier-pxs2-ave424 - socionext,uniphier-ld11-ave4[all …]
1 // SPDX-License-Identifier: GPL-2.03 * sni_ave.c - Socionext UniPhier AVE ethernet driver5 * Copyright 2015-2017 Socionext Inc.175 #define AVE_PFNUM_MULTICAST 11 /* No.11-17 */205 #define SG_ETPINMODE_EXTPHY BIT(1) /* for LD11 */208 #define IS_DESC_64BIT(p) ((p)->data->is_desc_64bit)302 addr = ((id == AVE_DESCID_TX) ? priv->tx.daddr : priv->rx.daddr) in ave_desc_read()303 + entry * priv->desc_size + offset; in ave_desc_read()305 return readl(priv->base + addr); in ave_desc_read()320 addr = ((id == AVE_DESCID_TX) ? priv->tx.daddr : priv->rx.daddr) in ave_desc_write()[all …]
... arm926ejs/mxs/clock.c u-boot-2021.07/arch/arm/cpu/arm926ejs/ ...