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Searched +full:sun4i +full:- +full:a10 +full:- +full:pll6 +full:- +full:clk (Results 1 – 17 of 17) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/clock/sun4i-a10-pll2.h>
48 #include <dt-bindings/dma/sun4i-a10.h>
49 #include <dt-bindings/pinctrl/sun4i-a10.h>
52 interrupt-parent = <&intc>;
55 #address-cells = <1>;
56 #size-cells = <0>;
60 compatible = "arm,cortex-a8";
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H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun4i-a10-pll2.h>
49 #include <dt-bindings/dma/sun4i-a10.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&intc>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
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H A Dsun5i-gr8.dtsi4 * Mylène Josserand <mylene.josserand@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun4i-a10-pll2.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/pinctrl/sun4i-a10.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
56 #size-cells = <0>;
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H A Dsun7i-a20.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/thermal/thermal.h>
50 #include <dt-bindings/clock/sun4i-a10-pll2.h>
51 #include <dt-bindings/dma/sun4i-a10.h>
52 #include <dt-bindings/pinctrl/sun4i-a10.h>
55 interrupt-parent = <&gic>;
62 #address-cells = <1>;
63 #size-cells = <1>;
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H A Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/thermal/thermal.h>
50 #include <dt-bindings/pinctrl/sun4i-a10.h>
53 interrupt-parent = <&gic>;
60 #address-cells = <1>;
61 #size-cells = <1>;
65 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
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H A Dsun8i-a23-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/pinctrl/sun4i-a10.h>
52 interrupt-parent = <&gic>;
55 #address-cells = <1>;
56 #size-cells = <1>;
60 compatible = "allwinner,simple-framebuffer",
61 "simple-framebuffer";
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H A Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
50 compatible = "arm,cortex-a7";
56 compatible = "arm,cortex-a7";
69 #clock-cells = <0>;
70 compatible = "fixed-clock";
71 clock-frequency = <0>;
72 clock-output-names = "pll11";
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun4i-a10-pll6-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll6-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Peripheral PLL Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
23 const: allwinner,sun4i-a10-pll6-clk
31 clock-output-names:
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H A Dallwinner,sun4i-a10-usb-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-usb-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 USB Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
22 "#reset-cells":
27 - allwinner,sun4i-a10-usb-clk
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H A Dallwinner,sun4i-a10-mod0-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Module 0 Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
20 - allwinner,sun4i-a10-mod0-clk
21 - allwinner,sun9i-a80-mod0-clk
27 - compatible
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H A Dallwinner,sun4i-a10-mmc-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Module 1 Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
25 - allwinner,sun4i-a10-mmc-clk
26 - allwinner,sun9i-a80-mmc-clk
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H A Dallwinner,sun4i-a10-apb1-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb1-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 APB1 Bus Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
20 const: allwinner,sun4i-a10-apb1-clk
30 clock-output-names:
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H A Dallwinner,sun4i-a10-ahb-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 AHB Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
21 - allwinner,sun4i-a10-ahb-clk
22 - allwinner,sun6i-a31-ahb1-clk
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H A Dallwinner,sun4i-a10-mbus-clk.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mbus-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 MBUS Clock Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 "#clock-cells":
21 - allwinner,sun5i-a13-mbus-clk
22 - allwinner,sun8i-a23-mbus-clk
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/OK3568_Linux_fs/kernel/drivers/clk/sunxi/
H A Dclk-sunxi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 #include <linux/clk.h>
9 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
19 #include "clk-factors.h"
27 * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL1
38 div = req->rate / 6000000; in sun4i_get_pll1_factors()
39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()
42 req->m = 0; in sun4i_get_pll1_factors()
45 if (req->rate >= 768000000 || req->rate == 42000000 || in sun4i_get_pll1_factors()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun4i.c6 * Based on sun4i Linux kernel sources mach-sunxi/pm/standby/dram*.c
7 * and earlier U-Boot Allwiner A10 SPL work
9 * (C) Copyright 2007-2012
14 * SPDX-License-Identifier: GPL-2.0+
69 writel(0, &timer->cpu_cfg); in mctl_ddr3_reset()
70 reg_val = readl(&timer->cpu_cfg); in mctl_ddr3_reset()
74 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
76 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
80 clrbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
82 setbits_le32(&dram->mcr, DRAM_MCR_RESET); in mctl_ddr3_reset()
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/OK3568_Linux_fs/kernel/drivers/clk/sunxi-ng/
H A Dccu-sun4i-a10.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
26 #include "ccu-sun4i-a10.h"
36 .hw.init = CLK_HW_INIT("pll-core",
48 * With sigma-delta modulation for fractional-N on the audio PLL,
71 .hw.init = CLK_HW_INIT("pll-audio-base",
89 .hw.init = CLK_HW_INIT("pll-video0",
104 .hw.init = CLK_HW_INIT("pll-ve",
117 .hw.init = CLK_HW_INIT("pll-ve",
130 .hw.init = CLK_HW_INIT("pll-ddr-base",
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