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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Drockchip-dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Rockchip 10/100/1000 Ethernet driver(GMAC)
10 - David Wu <david.wu@rock-chips.com>
18 - rockchip,px30-gmac
19 - rockchip,rk3128-gmac
20 - rockchip,rk3228-gmac
21 - rockchip,rk3288-gmac
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
45 This selects the full function, default is Y, full-featured version
65 tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
70 Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
81 tristate "Adaptrum Anarion GMAC support"
85 Support for Adaptrum Anarion GMAC Ethernet controller.
100 will behave like standard non-accelerated ethernet interfaces.
111 tristate "MediaTek MT27xx GMAC support"
114 Support for MediaTek GMAC Ethernet controller.
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A D.rk3288-rock2-square.dtb.dts.tmp
H A Drk3288-phycore-som.dtsi2 * Device tree file for Phytec phyCORE-RK3288 SoM
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/net/ti-dp83867.h>
46 #include "rk3288.dtsi"
47 #include "rk3288-u-boot.dtsi"
50 model = "Phytec RK3288 phyCORE";
51 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
68 ext_gmac: external-gmac-clock {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
[all …]
H A D.rk3288-phycore-rdk.dtb.dts.tmp
H A D.rk3288-fennec.dtb.dts.tmp
H A D.rk3288-firefly.dtb.dts.tmp
H A D.rk3288-miqi.dtb.dts.tmp
H A D.rk3368-lion.dtb.dts.tmp
H A D.rk3368-sheep.dtb.dts.tmp
H A D.rk3368-geekbox.dtb.dts.tmp
H A Drk3288-miqi.dtsi4 * SPDX-License-Identifier: GPL-2.0+ X11
7 #include "rk3288.dtsi"
8 #include "rk3288-u-boot.dtsi"
9 #include <dt-bindings/input/input.h>
17 adc-keys {
18 compatible = "adc-keys";
19 io-channels = <&saradc 1>;
21 volup-key {
24 press-threshold-microvolt = <18000>;
28 ext_gmac: external-gmac-clock {
[all …]
H A Drk3288-rock2-som.dtsi2 * This file is dual-licensed: you can use it either under the terms
41 #include <dt-bindings/pwm/pwm.h>
42 #include "rk3288.dtsi"
43 #include "rk3288-u-boot.dtsi"
51 emmc_pwrseq: emmc-pwrseq {
52 compatible = "mmc-pwrseq-emmc";
53 pinctrl-0 = <&emmc_reset>;
54 pinctrl-names = "default";
55 reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
58 ext_gmac: external-gmac-clock {
[all …]
H A D.rk3368-px5-evb.dtb.dts.tmp
H A D.rk3288-evb.dtb.dts.tmp
H A D.rk3288-popmetal.dtb.dts.tmp
H A D.rk3288-tinker.dtb.dts.tmp
H A Drk3368.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/rk3368-cru.h>
44 #include <dt-bindings/gpio/gpio.h>
45 #include <dt-bindings/interrupt-controller/irq.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/pinctrl/rockchip.h>
48 #include <dt-bindings/thermal/thermal.h>
49 #include <dt-bindings/memory/rk3368-dmc.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <2>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk3288-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
8 #include <dt-bindings/net/ti-dp83867.h>
9 #include "rk3288.dtsi"
12 model = "Phytec RK3288 phyCORE";
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <125000000>;
[all …]
H A Drk3288-veyron-fievel.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-analog-audio.dtsi"
14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18 "google,veyron-fievel-rev0", "google,veyron-fievel",
19 "google,veyron", "rockchip,rk3288";
[all …]
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Firefly Rockchip RK3288 Core board
7 #include <dt-bindings/input/input.h>
8 #include "rk3288.dtsi"
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
[all …]
H A Drk3288-vyasa.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "rk3288.dtsi"
10 model = "Amarula Vyasa-RK3288";
11 compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
14 stdout-path = &uart2;
22 dc12_vbat: dc12-vbat {
23 compatible = "regulator-fixed";
24 regulator-name = "dc12_vbat";
25 regulator-min-microvolt = <12000000>;
[all …]
H A Drk3288-phycore-rdk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec PCM-947 carrier board
8 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/leds-pca9532.h>
12 #include "rk3288-phycore-som.dtsi"
15 model = "Phytec RK3288 PCM-947";
16 compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
18 user_buttons: user-buttons {
19 compatible = "gpio-keys";
[all …]
H A Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/soc/rockchip,boot-mode.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
[all …]

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