xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun%YAML 1.2
3*4882a593Smuzhiyun---
4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#"
5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*4882a593Smuzhiyun
7*4882a593Smuzhiyuntitle: Rockchip 10/100/1000 Ethernet driver(GMAC)
8*4882a593Smuzhiyun
9*4882a593Smuzhiyunmaintainers:
10*4882a593Smuzhiyun  - David Wu <david.wu@rock-chips.com>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun# We need a select here so we don't match all nodes with 'snps,dwmac'
13*4882a593Smuzhiyunselect:
14*4882a593Smuzhiyun  properties:
15*4882a593Smuzhiyun    compatible:
16*4882a593Smuzhiyun      contains:
17*4882a593Smuzhiyun        enum:
18*4882a593Smuzhiyun          - rockchip,px30-gmac
19*4882a593Smuzhiyun          - rockchip,rk3128-gmac
20*4882a593Smuzhiyun          - rockchip,rk3228-gmac
21*4882a593Smuzhiyun          - rockchip,rk3288-gmac
22*4882a593Smuzhiyun          - rockchip,rk3308-gmac
23*4882a593Smuzhiyun          - rockchip,rk3328-gmac
24*4882a593Smuzhiyun          - rockchip,rk3366-gmac
25*4882a593Smuzhiyun          - rockchip,rk3368-gmac
26*4882a593Smuzhiyun          - rockchip,rk3399-gmac
27*4882a593Smuzhiyun          - rockchip,rk3528-gmac
28*4882a593Smuzhiyun          - rockchip,rk3562-gmac
29*4882a593Smuzhiyun          - rockchip,rk3568-gmac
30*4882a593Smuzhiyun          - rockchip,rk3588-gmac
31*4882a593Smuzhiyun          - rockchip,rv1106-gmac
32*4882a593Smuzhiyun          - rockchip,rv1108-gmac
33*4882a593Smuzhiyun          - rockchip,rv1126-gmac
34*4882a593Smuzhiyun  required:
35*4882a593Smuzhiyun    - compatible
36*4882a593Smuzhiyun
37*4882a593SmuzhiyunallOf:
38*4882a593Smuzhiyun  - $ref: "snps,dwmac.yaml#"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyunproperties:
41*4882a593Smuzhiyun  compatible:
42*4882a593Smuzhiyun    oneOf:
43*4882a593Smuzhiyun      - items:
44*4882a593Smuzhiyun          - enum:
45*4882a593Smuzhiyun              - rockchip,px30-gmac
46*4882a593Smuzhiyun              - rockchip,rk3128-gmac
47*4882a593Smuzhiyun              - rockchip,rk3228-gmac
48*4882a593Smuzhiyun              - rockchip,rk3288-gmac
49*4882a593Smuzhiyun              - rockchip,rk3308-gmac
50*4882a593Smuzhiyun              - rockchip,rk3328-gmac
51*4882a593Smuzhiyun              - rockchip,rk3366-gmac
52*4882a593Smuzhiyun              - rockchip,rk3368-gmac
53*4882a593Smuzhiyun              - rockchip,rk3399-gmac
54*4882a593Smuzhiyun              - rockchip,rk3562-gmac
55*4882a593Smuzhiyun              - rockchip,rv1108-gmac
56*4882a593Smuzhiyun      - items:
57*4882a593Smuzhiyun          - enum:
58*4882a593Smuzhiyun              - rockchip,rk3528-gmac
59*4882a593Smuzhiyun              - rockchip,rk3562-gmac
60*4882a593Smuzhiyun              - rockchip,rk3568-gmac
61*4882a593Smuzhiyun              - rockchip,rk3588-gmac
62*4882a593Smuzhiyun              - rockchip,rv1106-gmac
63*4882a593Smuzhiyun              - rockchip,rv1126-gmac
64*4882a593Smuzhiyun          - const: snps,dwmac-4.20a
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun  clocks:
67*4882a593Smuzhiyun    minItems: 5
68*4882a593Smuzhiyun    maxItems: 8
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun  clock-names:
71*4882a593Smuzhiyun    contains:
72*4882a593Smuzhiyun      enum:
73*4882a593Smuzhiyun        - stmmaceth
74*4882a593Smuzhiyun        - mac_clk_tx
75*4882a593Smuzhiyun        - mac_clk_rx
76*4882a593Smuzhiyun        - aclk_mac
77*4882a593Smuzhiyun        - pclk_mac
78*4882a593Smuzhiyun        - clk_mac_ref
79*4882a593Smuzhiyun        - clk_mac_refout
80*4882a593Smuzhiyun        - clk_mac_speed
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun  clock_in_out:
83*4882a593Smuzhiyun    description:
84*4882a593Smuzhiyun      For RGMII, it must be "input", means main clock(125MHz)
85*4882a593Smuzhiyun      is not sourced from SoC's PLL, but input from PHY.
86*4882a593Smuzhiyun      For RMII, "input" means PHY provides the reference clock(50MHz),
87*4882a593Smuzhiyun      "output" means GMAC provides the reference clock.
88*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/string
89*4882a593Smuzhiyun    enum: [input, output]
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun  rockchip,grf:
92*4882a593Smuzhiyun    description: The phandle of the syscon node for the general register file.
93*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/phandle
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun  tx_delay:
96*4882a593Smuzhiyun    description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
97*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun  rx_delay:
100*4882a593Smuzhiyun    description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
101*4882a593Smuzhiyun    $ref: /schemas/types.yaml#/definitions/uint32
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun  phy-supply:
104*4882a593Smuzhiyun    description: PHY regulator
105*4882a593Smuzhiyun
106*4882a593Smuzhiyunrequired:
107*4882a593Smuzhiyun  - compatible
108*4882a593Smuzhiyun  - clocks
109*4882a593Smuzhiyun  - clock-names
110*4882a593Smuzhiyun
111*4882a593SmuzhiyununevaluatedProperties: false
112*4882a593Smuzhiyun
113*4882a593Smuzhiyunexamples:
114*4882a593Smuzhiyun  - |
115*4882a593Smuzhiyun    #include <dt-bindings/interrupt-controller/arm-gic.h>
116*4882a593Smuzhiyun    #include <dt-bindings/clock/rk3288-cru.h>
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun    gmac: ethernet@ff290000 {
119*4882a593Smuzhiyun        compatible = "rockchip,rk3288-gmac";
120*4882a593Smuzhiyun        reg = <0xff290000 0x10000>;
121*4882a593Smuzhiyun        interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
122*4882a593Smuzhiyun        interrupt-names = "macirq";
123*4882a593Smuzhiyun        clocks = <&cru SCLK_MAC>,
124*4882a593Smuzhiyun                 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
125*4882a593Smuzhiyun                 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
126*4882a593Smuzhiyun                 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
127*4882a593Smuzhiyun        clock-names = "stmmaceth",
128*4882a593Smuzhiyun                      "mac_clk_rx", "mac_clk_tx",
129*4882a593Smuzhiyun                      "clk_mac_ref", "clk_mac_refout",
130*4882a593Smuzhiyun                      "aclk_mac", "pclk_mac";
131*4882a593Smuzhiyun        assigned-clocks = <&cru SCLK_MAC>;
132*4882a593Smuzhiyun        assigned-clock-parents = <&ext_gmac>;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun        rockchip,grf = <&grf>;
135*4882a593Smuzhiyun        phy-mode = "rgmii";
136*4882a593Smuzhiyun        clock_in_out = "input";
137*4882a593Smuzhiyun        tx_delay = <0x30>;
138*4882a593Smuzhiyun        rx_delay = <0x10>;
139*4882a593Smuzhiyun    };
140